/******************************************************************************
													Copyright (c) Motorola 2000
File Name		 :	$RCSfile: s12_fectl.h,v $		
	
Engineer		 :	$Author: estyger $

Location		 :	EKB

Date Created	 :	09/01/01

Current Revision :	$Revision: 1.1.1.1 $

Notes	:					

*******************************************************************************
Motorola reserves the right to make changes without further notice to any
product	herein to improve reliability, function	or design. Motorola does not
assume any liability arising out of the	application or use of any product,
circuit, or software described	herein;	neither	does it	convey any license
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that Motorola was negligent regarding the design or manufacture	of the part.
Motorola and the Motorola logo*	are registered trademarks of Motorola Ltd.
******************************************************************************/

#ifndef FECTL_H
#define FECTL_H

/************************* System Include Files ******************************/


/************************* Project Include Files *****************************/
#include "stdtypes.h"

/************************* typedefs ******************************************/
typedef union uFCLKDIV
  {
  UINT8	byte;
  struct
    {
    UINT8 fdiv		:6;		/*clk divider */
    UINT8 fdiv8		:1;		/*clk /8 prescaler enable */
    UINT8 fdivld	:1;		/*clock divider loaded flag */
    }bit;
  }tFCLKDIV;

typedef union uFSEC
  {
  UINT8	byte;
  struct
    {
    UINT8 sec0		:2;		/*memory security bit */
    UINT8 nv		:5;		/*user non volatile flag bits */
    UINT8 keyen		:1;		/*security key access enable */
    }bit;
  }tFSEC;

typedef union uFCNFG
  {
  UINT8	byte;
  struct
    {
    UINT8 bksel		:2;		/*register bank select */
    UINT8			:3;		/*not used */
    UINT8 keyacc	:1;		/*security key writing enable */
    UINT8 ccie		:1;		/*command complete interrupt enable */
    UINT8 cbeie		:1;		/*command buffer empty interrupt enable	*/
    }bit;
  }tFCNFG;

typedef union uFPROT
  {
  UINT8	byte;
  struct
    {
    UINT8 fpls		:2;		/*flash protection lower address size */
    UINT8 fpldis	:1;		/*flash protection lower address range disable */
    UINT8 fphs		:2;		/*flash protection higher address size */
    UINT8 fphdis	:1;		/*flash protection higher address range disable */
    UINT8 			:1;		/*contains value of equivalent bit in protection byte */
    UINT8 fopen		:1;		/*open block for program/erase control */
    }bit;
  }tFPROT;

typedef union uFSTAT
  {
  UINT8	byte;
  struct
    {
    UINT8 			:2;		/*not used */
    UINT8 blank		:1;		/*blank verify flag */
    UINT8 			:1;		/*not used */
    UINT8 accerr 	:1;		/*access error flag */
    UINT8 pviol		:1;		/*protection violation flag */
    UINT8 ccif		:1;		/*command complete interrupt flag */
    UINT8 cbeif		:1;		/*command buffer empty interrupt flag */
    }bit;
  }tFSTAT;

typedef union uFCMD
  {
  UINT8	byte;
  struct
    {
    UINT8 mass		:1;		/*mass erase enable	*/
	UINT8 			:1;		/*not used */
    UINT8 erver		:1;		/*erase verify enable */
	UINT8 			:2;		/*not used */
    UINT8 prog		:1;		/*word programming */
    UINT8 erase		:1;		/*erase control */
	UINT8 			:1;		/*not used */
    }bit;
  }tFCMD;

typedef struct						/*flash datastructure */
  {
  volatile tFCLKDIV		fclkdiv;	/*flash clock divider register */
  volatile tFSEC		fsec;		/*flash security register */
		   UINT8		rsvfee1;	/*reserved */
           tFCNFG		fcnfg;		/*flash configuration register */
  volatile tFPROT		fprot;		/*flash protection register */
  volatile tFSTAT		fstat;		/*flash status register */
  		   tFCMD		fcmd;		/*flash command buffer & status register */
  volatile UINT8		rsvfee2[9];	/*reserved */
  }tFLASH;


/************************* Extern Variables **********************************/


/************************* #Defines ******************************************/
#define FDIV8	0x40	/*bit masks	*/
#define FDIVLD	0x80

#define SEC00	0x01	/*bit masks	*/
#define SEC01	0x02
#define NV2		0x04
#define NV3		0x08
#define NV4		0x10
#define NV5 	0x20
#define NV6		0x40
#define KEYEN	0x80

#define BKSEL0	0x01	/*bit masks	*/
#define BKSEL1	0x02
#define BKSEL	0x03	/*bank select mask */
#define KEYACC	0x20	
#define CCIE	0x40	
#define CCBIE	0x80

#define FPLS0	0x01	/*bit masks	*/
#define FPLS1	0x02
#define FPLS	0x03	/*fpls block size mask */
#define FPLDIS	0x04	
#define FPHS0	0x08	
#define FPHS1	0x10
#define FPHS	0x18	/*fphs block size mask */
#define FPHDIS	0x20	
#define FOPEN	0x80

#define BLANK	0x04	/*bit masks	*/
#define ACCERR	0x10
#define PVIOL 	0x20
#define CCIF	0x40
#define CBEIF	0x80

#define MASS	0x01	/*bit masks	*/
#define ERVER	0x04
#define PROG	0x20
#define ERASE	0x40

/************************* Macros ********************************************/

   /* Macro that generates the FLASH clock precaler as per data book. 
      If the crystal frequency is above 12.8MHz then the FDIV bit must 
      be set, this divides the OSCCLK frequency by 8 before the prescaler. */
#if (OSCCLK_FREQ_KHZ > 12800)  
   /* This macro calculates the prescaler, but also implements the FDIV8 bit */
#if ((OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200)) % (1600 * BUSCLK_FREQ_KHZ) == 0)
#define FCLK_PRESCALER ((OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) / (1600 * BUSCLK_FREQ_KHZ)) + FDIV8 - 1)
#else
#define FCLK_PRESCALER ((OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) / (1600 * BUSCLK_FREQ_KHZ)) + FDIV8)
#endif /* OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) % (1600 * BUSCLK_FREQ_KHZ) == 0 */
   /* Make sure FCLK is within specified range. */
#define FCLK_FREQ_KHZ (OSCCLK_FREQ_KHZ / (8 * (1 + FCLK_PRESCALER))) 
#if ((FCLK_FREQ_KHZ < 150) || (FCLK_FREQ_KHZ > 200) || (FCLK_PRESCALER > 0x7F))
#error FLASH prescaler or clock out of range.
#endif /* Incorrect FCLK frequency. */

#else
   /* This macro calculates the prescaler. */
#if ((OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200)) % (200 * BUSCLK_FREQ_KHZ) == 0)
#define FCLK_PRESCALER ((OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) / (200 * BUSCLK_FREQ_KHZ)) - 1)
#else
#define FCLK_PRESCALER (OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) / (200 * BUSCLK_FREQ_KHZ))
#endif /* OSCCLK_FREQ_KHZ * (BUSCLK_FREQ_KHZ + 200) % (200 * BUSCLK_FREQ_KHZ) == 0 */ 
   /* Make sure FCLK is within specified range. */
#define FCLK_FREQ_KHZ (OSCCLK_FREQ_KHZ / (1 + FCLK_PRESCALER)) 
#if ((FCLK_FREQ_KHZ < 150) || (FCLK_FREQ_KHZ > 200) || (FCLK_PRESCALER > 0x3F))
#error FLASH prescaler or clock out of range.
#endif /* Incorrect FCLK frequency. */
#endif /* OSCCLK_FREQ_KHZ > 12800 */


/************************* Prototypes ****************************************/
void  ConfigFCLKDIV(void);
UINT8 ProgFlash(UINT16*, UINT16*, UINT16);

#endif	/* End of Header file !defined	*/