;*********************************************************************
; File Name:	 lfdac.asm
; Target System: C240x Evaluation Board
;
; Description:	 Outputs 4 Sine Waves on the EVM DAC - DAC0,DAC1,DAC2,DAC3
;                Sine waves generated through a look up table and
;                interpolation.  
;
;                Manipulating the following variables allows one to control
;                the sine wave
;                    FREQSTEPx - modifies the frequency
;                    MODREGx - modifies the starting angle
;                    MAGx - modifies the peak to peak voltage
;                where x is 0,1,2,3
;
;
; Revision:      1.00
;
;*********************************************************************
		.include	"240x.h"
;---------------------------------------------------------------------
; I/O Mapped EVM Registers
;---------------------------------------------------------------------
DAC0     	.set    0000h		;DAC Channel 0 Register
DAC1     	.set    0001h		;DAC Channel 1 Register
DAC2     	.set    0002h		;DAC Channel 2 Register
DAC3     	.set    0003h		;DAC Channel 3 Register
DAC_UPDATE      .set    0004h		;DAC Update Register
SWITCHES	.set    0008h		;DIP Switch Register
LEDS      	.set    000Ch		;LEDs Register
temp		.set    8000h

;---------------------------------------------------------------------
; Variables Declartion for B2
;---------------------------------------------------------------------
		.bss	GPR0,1	        ;General Purpose Register
		.bss	DAC0VAL,1	;DAC0 Channel Value
		.bss	DAC1VAL,1	;DAC1 Channel Value
		.bss	DAC2VAL,1	;DAC2 Channel Value
		.bss	DAC3VAL,1	;DAC3 Channel Value

;===========================================================================================
; V E C T O R    T A B L E    ( including RT monitor traps )
;===========================================================================================
 
        	.copy		"vector.h" 
 
;==========================================================================================
; M A I N   C O D E  - starts here
;==========================================================================================
			.text
START:          LDP	#0h
		SETC	INTM			;Disable interrupts
		SETC	CNF
		SPLK	#0h, IMR		;Mask all Ints
		LACC	IFR			;Read Interrupt flags
		SACL	IFR			;Clear all interrupt flags

		CLRC	SXM			;Clear Sign Extension Mode
		CLRC	OVM			;Reset Overflow Mode
		CLRC	CNF			;Config Block B0 to Data mem.   
		 
		LDP	#00E0h 
                SPLK    #0285h, SCSR1	        ; x2 PLL, ADC en, EV1 en, clr Ill Addr flg		

		SPLK	#006Fh, WDCR    	;Disable WD if VCCP=5V
		KICK_DOG

		SPLK	#0h, GPR0       	;Set 1 wait states for I/O space
		OUT	GPR0, WSGR

;The DAC module requires that wait states be generated for proper operation.

		LDP	#0000h			;DP for address 0000h-007Fh, B2
		SPLK	#4h,GPR0		;Set Wait State Generator for
		OUT	GPR0,WSGR		;Program Space, 0 wait states
						;Data Space, 0 wait states
						;I/O Space, 1 wait state


;==================================================================================
; The following section creates sine waves for each channel
;==================================================================================

		.bss	TABLE,1			;Keeps address of the pointer in the SINE Table
		.bss	TOPTABLE,1		;Keeps the reset value for the pointer

		.bss	REMAINDER,1		;Remainder of the MODREGx values
		.bss	VALUE,1			;SINE Table Value 
		.bss	NEXTVALUE,1 		;Next entry in the SINE Table
		.bss	DIFFERENCE,1		;Difference between Entries
		
		.bss 	FREQSTEP0,1		;Frequency modulation of the 1st sine wave
		.bss	MODREG0,1		;Rolling Modulo Register for 1st sine wave
		.bss	MAG0,1			;Magnitude of the frequency for 1st sine wave

		.bss	FREQSTEP1,1		;Frequency modulation of the 2nd sine wave
		.bss	MODREG1,1		;Rolling Modulo Register for 2nd sine wave 
		.bss	MAG1,1			;Magnitude of the frequency for 2nd sine wave

		.bss 	FREQSTEP2,1		;Frequency modulation of the 3rd sine wave
		.bss	MODREG2,1		;Rolling Modulo Register for 3rd sine wave
		.bss	MAG2,1			;Magnitude of the frequency for 3rd sine wave

		.bss	FREQSTEP3,1		;Frequency modulation of the 4th sine wave
		.bss	MODREG3,1		;Rolling Modulo Register for 4th sine wave 
		.bss	MAG3,1			;Magnitude of the frequency for 4th sine wave


		.text
		SPLK	#0000h,TABLE
		SPLK	#STABLE,TOPTABLE

		SPLK	#1000,FREQSTEP0		;Controls the frequency for DAC0
		SPLK	#0C000h,MODREG0		;Sets the starting point
		SPLK	#7FFFh,MAG0		;Maximum value, Q15

		SPLK	#1000,FREQSTEP1		;Controls the frequency for DAC1
		SPLK	#0000h,MODREG1		;Sets the starting point
		SPLK	#7FFFh,MAG1		;Maximum value, Q15

		SPLK	#1000,FREQSTEP2		;Controls the frequency for DAC2
		SPLK	#4000h,MODREG2		;Sets the starting point
		SPLK	#7FFFh,MAG2		;Maximum value, Q15

		SPLK	#1000,FREQSTEP3		;Controls the frequency for DAC3
		SPLK	#08000h,MODREG3		;Sets the starting point
		SPLK	#7FFFh,MAG3		;Maximum value, Q15

;The following section performs the necessary calculations for the first sine wave

SINE	        LDP	#0			
		LACC	MODREG0		;ACC loaded with the counting register
		ADD	FREQSTEP0	;Counting Register increased by specific step
		SACL	MODREG0		;Store the updated the counter value
		LACC	MODREG0,8	;Reload the new counter value but shift left by 8 bits
		SACH	TABLE		;Store the high bit into the TABLE as pointer to lookup table
		SFR			;Shift the value to the right convert to Q15
		AND	#07FFFh		;Make sure the Q15 value is positive
		SACL 	REMAINDER		;Store the fractional value of the counting register

		LACC	TABLE			;Load the accumulator with the proper index value
		ADD	TOPTABLE		;Displace the ACC with the starting address
		TBLR	VALUE			;Read the value from the table and store into VALUE
		ADD	#1			;Increment the ACC to the next address
		TBLR	NEXTVALUE		;Read the next value from the table and store into NEXTVALUE

		LACC	NEXTVALUE		;Load the ACC with NEXTVALUE
		SUB	VALUE			;Subtract the previous value
		SACL	DIFFERENCE		;Store the difference between the values into DIFFERENCE	
		
		LT	DIFFERENCE		;Load the TREG with DIFFERENCE
		MPY	REMAINDER		;Multiply the DIFFERENCE with REMAINDER
		PAC				;Move the product to the ACC

		SACH	REMAINDER,1		;Store the upper byte to REMAINER and shift left by 1, Q15
		LACC	REMAINDER		;Load ACC with new REMAINDER
		ADD	VALUE			;Add VALUE to get the new interpolated value
		SACL	VALUE			;Store the interpolated value into VALUE

		LT	VALUE			;Load the TREG with the new interpolated VALUE
		MPY	MAG0			;Multiply VALUE by a magnitude 
		PAC				;Move the product to ACC
		SACH	DAC0VAL,1		;Store the new value to DAC0VAL to output, shift to get Q15

;The following section performs the necessary calculations for the second sine wave

		LACC	MODREG1 		;ACC loaded with the counting register
		ADD 	FREQSTEP1		;Counting Register increased by specific step
		SACL	MODREG1	        	;Store the updated the counter value
		LACC	MODREG1,8		;Reload the new counter value but shift left by 8 bits
		SACH	TABLE			;Store the high bit into the TABLE as pointer to lookup table
		SFR				;Shift the value to the right convert to Q15
		AND	#07FFFh 		;Make sure the Q15 value is positive
		SACL 	REMAINDER		;Store the fractional value of the counting register

		LACC	TABLE			;Load the accumulator with the proper index value
		ADD	TOPTABLE		;Displace the ACC with the starting address
		TBLR	VALUE			;Read the value from the table and store into VALUE
		ADD	#1			;Increment the ACC to the next address
		TBLR	NEXTVALUE		;Read the next value from the table and store into NEXTVALUE

		LACC	NEXTVALUE		;Load the ACC with NEXTVALUE
		SUB	VALUE			;Subtract the previous value
		SACL	DIFFERENCE		;Store the difference between the values into DIFFERENCE
		
		LT	DIFFERENCE		;Load the TREG with DIFFERENCE
		MPY	REMAINDER		;Multiply the DIFFERENCE with REMAINDER
		PAC				;Move the product to the ACC
		SACH	REMAINDER,1		;Store the upper byte to REMAINER and shift left by 1, Q15

		LACC	REMAINDER		;Load ACC with new REMAINDER
		ADD	VALUE			;Add VALUE to get the new interpolated value
		SACL	VALUE			;Store the interpolated value into VALUE

		LT	VALUE			;Load the TREG with the new interpolated VALUE
		MPY	MAG1			;Multiply VALUE by a magnitude 
		PAC				;Move the product to ACC