{	switch (host) {	case PCI_HOST0:		switch (region) {		case PCI_IO:			return PCI_0I_O_LOW_DECODE_ADDRESS;		case PCI_REGION0:			return PCI_0MEMORY0_LOW_DECODE_ADDRESS;		case PCI_REGION1:			return PCI_0MEMORY1_LOW_DECODE_ADDRESS;		case PCI_REGION2:			return PCI_0MEMORY2_LOW_DECODE_ADDRESS;		case PCI_REGION3:			return PCI_0MEMORY3_LOW_DECODE_ADDRESS;		}	case PCI_HOST1:		switch (region) {		case PCI_IO:			return PCI_1I_O_LOW_DECODE_ADDRESS;		case PCI_REGION0:			return PCI_1MEMORY0_LOW_DECODE_ADDRESS;		case PCI_REGION1:			return PCI_1MEMORY1_LOW_DECODE_ADDRESS;		case PCI_REGION2:			return PCI_1MEMORY2_LOW_DECODE_ADDRESS;		case PCI_REGION3:			return PCI_1MEMORY3_LOW_DECODE_ADDRESS;		}	}	return PCI_0MEMORY0_LOW_DECODE_ADDRESS;}static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region){	switch (host) {	case PCI_HOST0:		switch (region) {		case PCI_IO:			return PCI_0I_O_ADDRESS_REMAP;		case PCI_REGION0:			return PCI_0MEMORY0_ADDRESS_REMAP;		case PCI_REGION1:			return PCI_0MEMORY1_ADDRESS_REMAP;		case PCI_REGION2:			return PCI_0MEMORY2_ADDRESS_REMAP;		case PCI_REGION3:			return PCI_0MEMORY3_ADDRESS_REMAP;		}	case PCI_HOST1:		switch (region) {		case PCI_IO:			return PCI_1I_O_ADDRESS_REMAP;		case PCI_REGION0:			return PCI_1MEMORY0_ADDRESS_REMAP;		case PCI_REGION1:			return PCI_1MEMORY1_ADDRESS_REMAP;		case PCI_REGION2:			return PCI_1MEMORY2_ADDRESS_REMAP;		case PCI_REGION3:			return PCI_1MEMORY3_ADDRESS_REMAP;		}	}	return PCI_0MEMORY0_ADDRESS_REMAP;}/********************************************************************* pciGetBaseAddress - Gets the base address of a PCI.*           - If the PCI size is 0 then this base address has no meaning!!!*** INPUT:   Bus, Region - The bus and region we ask for its base address.* OUTPUT:   N/A* RETURNS: PCI base address.*********************************************************************/unsigned int pciGetBaseAddress (PCI_HOST host, PCI_REGION region){	unsigned int regBase;	unsigned int regEnd;	unsigned int regOffset = pciGetRegOffset (host, region);	GT_REG_READ (regOffset, &regBase);	GT_REG_READ (regOffset + 8, &regEnd);	if (regEnd <= regBase)		return 0xffffffff;	/* ERROR !!! */	regBase = regBase << 16;	return regBase;}bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase,		  unsigned int bankBase, unsigned int bankLength){	unsigned int low = 0xfff;	unsigned int high = 0x0;	unsigned int regOffset = pciGetRegOffset (host, region);	unsigned int remapOffset = pciGetRemapOffset (host, region);	if (bankLength != 0) {		low = (bankBase >> 16) & 0xffff;		high = ((bankBase + bankLength) >> 16) - 1;	}	GT_REG_WRITE (regOffset, low | (1 << 24));	/* no swapping */	GT_REG_WRITE (regOffset + 8, high);	if (bankLength != 0) {	/* must do AFTER writing maps */		GT_REG_WRITE (remapOffset, remapBase >> 16);	/* sorry, 32 bits only.								   dont support upper 32								   in this driver */	}	return true;}unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region){	unsigned int low;	unsigned int regOffset = pciGetRegOffset (host, region);	GT_REG_READ (regOffset, &low);	return (low & 0xffff) << 16;}unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region){	unsigned int low, high;	unsigned int regOffset = pciGetRegOffset (host, region);	GT_REG_READ (regOffset, &low);	GT_REG_READ (regOffset + 8, &high);	return ((high & 0xffff) + 1) << 16;}/* ronen - 7/Dec/03*//********************************************************************* gtPciDisable/EnableInternalBAR - This function enable/disable PCI BARS.* Inputs: one of the PCI BAR*********************************************************************/void gtPciEnableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR){	RESET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);}void gtPciDisableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR){	SET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);}/********************************************************************* pciMapMemoryBank - Maps PCI_host memory bank "bank" for the slave.** Inputs: base and size of PCI SCS*********************************************************************/void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,		       unsigned int pciDramBase, unsigned int pciDramSize){	/*ronen different function for 3rd bank. */	unsigned int offset = (bank < 2) ? bank * 8 : 0x100 + (bank - 2) * 8;	pciDramBase = pciDramBase & 0xfffff000;	pciDramBase = pciDramBase | (pciReadConfigReg (host,						       PCI_SCS_0_BASE_ADDRESS						       + offset,						       SELF) & 0x00000fff);	pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + offset, SELF,			   pciDramBase);	if (pciDramSize == 0)		pciDramSize++;	GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1);	gtPciEnableInternalBAR (host, bank);}/********************************************************************* pciSetRegionFeatures - This function modifys one of the 8 regions with*                         feature bits given as an input.*                       - Be advised to check the spec before modifying them.* Inputs: PCI_PROTECT_REGION region - one of the eight regions.*         unsigned int features - See file: pci.h there are defintion for those*                                 region features.*         unsigned int baseAddress - The region base Address.*         unsigned int topAddress - The region top Address.* Returns: false if one of the parameters is erroneous true otherwise.*********************************************************************/bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,			   unsigned int features, unsigned int baseAddress,			   unsigned int regionLength){	unsigned int accessLow;	unsigned int accessHigh;	unsigned int accessTop = baseAddress + regionLength;	if (regionLength == 0) {	/* close the region. */		pciDisableAccessRegion (host, region);		return true;	}	/* base Address is store is bits [11:0] */	accessLow = (baseAddress & 0xfff00000) >> 20;	/* All the features are update according to the defines in pci.h (to be on	   the safe side we disable bits: [11:0] */	accessLow = accessLow | (features & 0xfffff000);	/* write to the Low Access Region register */	GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,		      accessLow);	accessHigh = (accessTop & 0xfff00000) >> 20;	/* write to the High Access Region register */	GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region,		      accessHigh - 1);	return true;}/********************************************************************* pciDisableAccessRegion - Disable The given Region by writing MAX size*                           to its low Address and MIN size to its high Address.** Inputs:   PCI_ACCESS_REGIONS region - The region we to be Disabled.* Returns:  N/A.*********************************************************************/void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region){	/* writing back the registers default values. */	GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,		      0x01001fff);	GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0);}/********************************************************************* pciArbiterEnable - Enables PCI-0`s Arbitration mechanism.** Inputs:   N/A* Returns:  true.*********************************************************************/bool pciArbiterEnable (PCI_HOST host){	unsigned int regData;	GT_REG_READ (pci_arbiter_control[host], &regData);	GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31);	return true;}/********************************************************************* pciArbiterDisable - Disable PCI-0`s Arbitration mechanism.** Inputs:   N/A* Returns:  true*********************************************************************/bool pciArbiterDisable (PCI_HOST host){	unsigned int regData;	GT_REG_READ (pci_arbiter_control[host], &regData);	GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff);	return true;}/********************************************************************* pciSetArbiterAgentsPriority - Priority setup for the PCI agents (Hi or Low)** Inputs:   PCI_AGENT_PRIO internalAgent - priotity for internal agent.*           PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.*           PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.*           PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.*           PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.*           PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.*           PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.* Returns:  true*********************************************************************/bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,				  PCI_AGENT_PRIO externalAgent0,				  PCI_AGENT_PRIO externalAgent1,				  PCI_AGENT_PRIO externalAgent2,				  PCI_AGENT_PRIO externalAgent3,				  PCI_AGENT_PRIO externalAgent4,				  PCI_AGENT_PRIO externalAgent5){	unsigned int regData;	unsigned int writeData;	GT_REG_READ (pci_arbiter_control[host], &regData);	writeData = (internalAgent << 7) + (externalAgent0 << 8) +		(externalAgent1 << 9) + (externalAgent2 << 10) +		(externalAgent3 << 11) + (externalAgent4 << 12) +		(externalAgent5 << 13);	regData = (regData & 0xffffc07f) | writeData;	GT_REG_WRITE (pci_arbiter_control[host], regData & regData);	return true;}/********************************************************************* pciParkingDisable - Park on last option disable, with this function you can*                      disable the park on last mechanism for each agent.*                      disabling this option for all agents results parking*                      on the internal master.** Inputs: PCI_AGENT_PARK internalAgent -  parking Disable for internal agent.*         PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.*         PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.*         PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.*         PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.*         PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.*         PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.* Returns:  true*********************************************************************/bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,			PCI_AGENT_PARK externalAgent0,			PCI_AGENT_PARK externalAgent1,			PCI_AGENT_PARK externalAgent2,			PCI_AGENT_PARK externalAgent3,			PCI_AGENT_PARK externalAgent4,			PCI_AGENT_PARK externalAgent5){