/* ---------------------------------------------------------------------------- *         ATMEL Microcontroller Software Support  -  ROUSSET  - * ---------------------------------------------------------------------------- * Copyright (c) 2006, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the disclaiimer below. * * - Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the disclaimer below in the documentation and/or * other materials provided with the distribution. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- * File Name           : at91sam9263ek.c * Object              : * Creation            : NLe Aug 8th 2006 *----------------------------------------------------------------------------- */#include "../../include/part.h"#include "../../include/gpio.h"#include "../../include/pmc.h"#include "../../include/debug.h"#include "../../include/sdramc.h"#include "../../include/main.h"#ifdef CFG_NANDFLASH#include "../../include/nandflash.h"#endif#ifdef CFG_DATAFLASH#include "../../include/dataflash.h"#endifstatic inline unsigned int get_cp15(void){	unsigned int value;	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));	return value;}static inline void set_cp15(unsigned int value){	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));}#ifdef CFG_HW_INIT/*---------------------------------------------------------------------------- *//* \fn    hw_init							       *//* \brief This function performs very low level HW initialization	       *//* This function is invoked as soon as possible during the c_startup	       *//* The bss segment must be initialized					       *//*---------------------------------------------------------------------------- */void hw_init(void){	/* Configure PIOs */	const struct pio_desc hw_pio[] = {#ifdef CFG_DEBUG		{"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},		{"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},#endif		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Disable watchdog */#warning Check Watchdog interface	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);	/* At this stage the main oscillator is supposed to be enabled	 * PCK = MCK = MOSC */	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);	/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);	/* Configure PLLB */	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);	/* Configure the PIO controller to output PCK0 */	pio_setup(hw_pio);#ifdef CFG_DEBUG	/* Enable Debug messages on the DBGU */	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));	dbg_print("Start AT91Bootstrap...\n\r");#endif /* CFG_DEBUG */#ifdef CFG_SDRAM	/* Initialize the matrix */#warning Configure EMAC priority       	/* VDDIOMSEL = 1 -> Memories are 3.3V powered */#warning VDDIOMSEL 3.3V check your SDRAM add on board	writel( readl(AT91C_BASE_CCFG + CCFG_EBICSA) | (1 << 16), AT91C_BASE_CCFG + CCFG_EBICSA);#warning configure SDRAM timings  	/* Configure SDRAM Controller */	sdram_init(	AT91C_SDRAMC_NC_9  |				AT91C_SDRAMC_NR_13 |				AT91C_SDRAMC_CAS_2 |				AT91C_SDRAMC_NB_4_BANKS |				AT91C_SDRAMC_DBW_32_BITS |				AT91C_SDRAMC_TWR_2 |				AT91C_SDRAMC_TRC_7 |				AT91C_SDRAMC_TRP_2 |				AT91C_SDRAMC_TRCD_2 |				AT91C_SDRAMC_TRAS_5 |				AT91C_SDRAMC_TXSR_8,			/* Control Register */				(MASTER_CLOCK * 7)/1000000);	/* Refresh Timer Register */#endif	/* CFG_SDRAM */}#endif /* CFG_HW_INIT */#ifdef CFG_SDRAM//*----------------------------------------------------------------------------//* \fn    sdramc_hw_init//* \brief This function performs SDRAMC HW initialization//*----------------------------------------------------------------------------*/void sdramc_hw_init(void){#warning sdramc_hw_init	/* Configure PIOs */	const struct pio_desc sdramc_pio[] = {		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the SDRAMC PIO controller */	pio_setup(sdramc_pio);}#endif#ifdef CFG_DATAFLASH/*------------------------------------------------------------------------------*//* \fn    df_hw_init								*//* \brief This function performs DataFlash HW initialization			*//*------------------------------------------------------------------------------*/void df_hw_init(void){#warning dataflash hw_init	/* Configure PIOs */	const struct pio_desc df_pio[] = {		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},		{"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},	};	/* Configure the PIO controller */	pio_setup(df_pio);}#endif /* CFG_DATAFLASH */