this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));	/* Send command to program the OOB data */	this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);	status = this->waitfunc (mtd, this, FL_WRITING);	/* See if device thinks it succeeded */	if (status & 0x01) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);		ret = -EIO;		goto out;	}	/* Return happy */	*retlen = len;#ifdef CONFIG_MTD_NAND_VERIFY_WRITE	/* Send command to read back the data */	this->cmdfunc (mtd, NAND_CMD_READOOB, column, page);	/* Loop through and verify the data */	for (i = 0; i < len; i++) {		if (buf[i] != this->read_byte(mtd)) {			DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);			ret = -EIO;			goto out;		}	}#endifout:	/* De-select the NAND device */	this->select_chip(mtd, -1);	/* Wake up anyone waiting on the device */	spin_lock_bh (&this->chip_lock);	this->state = FL_READY;	wake_up (&this->wq);	spin_unlock_bh (&this->chip_lock);	return ret;}/* * NAND write with iovec */static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count, 		loff_t to, size_t * retlen){	return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, 0));	}static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count, 		loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel){	int i, page, col, cnt, len, total_len, ret = 0, written = 0;	struct nand_chip *this = mtd->priv;	/* Calculate total length of data */	total_len = 0;	for (i = 0; i < count; i++)		total_len += (int) vecs[i].iov_len;	DEBUG (MTD_DEBUG_LEVEL3,	       "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);	/* Do not allow write past end of page */	if ((to + total_len) > mtd->size) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");		return -EINVAL;	}	/* reject writes, which are not page aligned */	//	if (NOTALIGNED (to) || NOTALIGNED(total_len)) {//		printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");//		return -EINVAL;//	}	// if oobsel is NULL, use chip defaults	if (oobsel == NULL) 		oobsel = &mtd->oobinfo;			/* Shift to get page */	page = ((int) to) >> this->page_shift;	/* Get the starting column */	col = to & (mtd->oobblock - 1);	/* Grab the lock and see if the device is available */	nand_get_chip (this, mtd, FL_WRITING, NULL);	/* Select the NAND device */	this->select_chip(mtd, 0);	/* Check the WP bit */	this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);	if (!(this->read_byte(mtd) & 0x80)) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Device is write protected!!!\n");		ret = -EIO;		goto out;	}	/* Loop until all iovecs' data has been written */	cnt = col;	len = 0;	while (count) {		/* 		 *  Check, if the tuple gives us not enough data for a 		 *  full page write. Then we can use the iov direct, 		 *  else we have to copy into data_buf.				 */		if (!cnt && (vecs->iov_len - len) >= mtd->oobblock) {			cnt = mtd->oobblock;			this->data_poi = (u_char *) vecs->iov_base;			this->data_poi += len;			len += mtd->oobblock; 			/* Check, if we have to switch to the next tuple */			if (len >= (int) vecs->iov_len) {				vecs++;				len = 0;				count--;			}		} else {			/*			 * Read data out of each tuple until we have a full page			 * to write or we've read all the tuples.		 	*///			int cnt = 0;			while ((cnt < mtd->oobblock) && count) {				if (vecs->iov_base != NULL && vecs->iov_len) {					this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];				}				/* Check, if we have to switch to the next tuple */				if (len >= (int) vecs->iov_len) {					vecs++;					len = 0;					count--;				}			}				this->data_poi = this->data_buf;			}				/* We use the same function for write and writev !) */		ret = nand_write_page (mtd, this, page, col, cnt, NULL, oobsel);		if (ret)			goto out;		/* Update written bytes count */		written += (cnt - col);		col = cnt = 0;		/* Increment page address */		page++;	}out:	/* De-select the NAND device */	this->select_chip(mtd, -1);	/* Wake up anyone waiting on the device */	spin_lock_bh (&this->chip_lock);	this->state = FL_READY;	wake_up (&this->wq);	spin_unlock_bh (&this->chip_lock);	*retlen = written;	return ret;}/* * NAND erase a block */static int nand_erase (struct mtd_info *mtd, struct erase_info *instr){	int page, len, status, pages_per_block, ret;	struct nand_chip *this = mtd->priv;	DECLARE_WAITQUEUE (wait, current);	DEBUG (MTD_DEBUG_LEVEL3,	       "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);	/* Start address must align on block boundary */	if (instr->addr & (mtd->erasesize - 1)) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");		return -EINVAL;	}	/* Length must align on block boundary */	if (instr->len & (mtd->erasesize - 1)) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");		return -EINVAL;	}	/* Do not allow erase past end of device */	if ((instr->len + instr->addr) > mtd->size) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");		return -EINVAL;	}	/* Grab the lock and see if the device is available */	nand_get_chip (this, mtd, FL_ERASING, NULL);	/* Shift to get first page */	page = (int) (instr->addr >> this->page_shift);	/* Calculate pages in each block */	pages_per_block = mtd->erasesize / mtd->oobblock;	/* Select the NAND device */	this->select_chip(mtd, 0);	/* Check the WP bit */	this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);	if (!(this->read_byte(mtd) & 0x80)) {		DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");		instr->state = MTD_ERASE_FAILED;		goto erase_exit;	}	/* Loop through the pages */	len = instr->len;	instr->state = MTD_ERASING;	while (len) {		/* Check if we have a bad block, we do not erase bad blocks ! */		if (this->block_bad(mtd, page)) {			printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);#ifndef CONFIG_MIZI // BUSHI			instr->state = MTD_ERASE_FAILED;			goto erase_exit;#endif /* CONFIG_MIZI */		}		/* Send commands to erase a page */		this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);		this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);		spin_unlock_bh (&this->chip_lock);		status = this->waitfunc (mtd, this, FL_ERASING);		/* Get spinlock, in case we exit */		spin_lock_bh (&this->chip_lock);		/* See if block erase succeeded */		if (status & 0x01) {			DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);			instr->state = MTD_ERASE_FAILED;			goto erase_exit;		}				/* Check, if we were interupted */		if (this->state == FL_ERASING) {			/* Increment page address and decrement length */			len -= mtd->erasesize;			page += pages_per_block;		}		/* Release the spin lock */		spin_unlock_bh (&this->chip_lock);erase_retry:		spin_lock_bh (&this->chip_lock);		/* Check the state and sleep if it changed */		if (this->state == FL_ERASING || this->state == FL_READY) {			/* Select the NAND device again, if we were interrupted */			this->state = FL_ERASING;			this->select_chip(mtd, 0);			continue;		} else {			set_current_state (TASK_UNINTERRUPTIBLE);			add_wait_queue (&this->wq, &wait);			spin_unlock_bh (&this->chip_lock);			schedule ();			remove_wait_queue (&this->wq, &wait);			goto erase_retry;		}	}	instr->state = MTD_ERASE_DONE;erase_exit:	/* De-select the NAND device */	this->select_chip(mtd, -1);	spin_unlock_bh (&this->chip_lock);	ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;;	/* Do call back function */	if (!ret && instr->callback)		instr->callback (instr);	/* The device is ready */	spin_lock_bh (&this->chip_lock);	this->state = FL_READY;//	wake_up (&this->wq);	spin_unlock_bh (&this->chip_lock);	/* Return more or less happy */	return ret;}/* * NAND sync */static void nand_sync (struct mtd_info *mtd){	struct nand_chip *this = mtd->priv;	DECLARE_WAITQUEUE (wait, current);	DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");retry:	/* Grab the spinlock */	spin_lock_bh (&this->chip_lock);	/* See what's going on */	switch (this->state) {	case FL_READY:	case FL_SYNCING:		this->state = FL_SYNCING;		spin_unlock_bh (&this->chip_lock);		break;	default:		/* Not an idle state */		add_wait_queue (&this->wq, &wait);		spin_unlock_bh (&this->chip_lock);		schedule ();		remove_wait_queue (&this->wq, &wait);		goto retry;	}	/* Lock the device */	spin_lock_bh (&this->chip_lock);	/* Set the device to be ready again */	if (this->state == FL_SYNCING) {		this->state = FL_READY;		wake_up (&this->wq);	}	/* Unlock the device */	spin_unlock_bh (&this->chip_lock);}/* * Scan for the NAND device */int nand_scan (struct mtd_info *mtd, int maxchips){	int i, nand_maf_id, nand_dev_id;	struct nand_chip *this = mtd->priv;	/* check for proper chip_delay setup, set 20us if not */	if (!this->chip_delay)		this->chip_delay = 20;	/* check, if a user supplied command function given */	if (this->cmdfunc == NULL)		this->cmdfunc = nand_command;	/* check, if a user supplied wait function given */	if (this->waitfunc == NULL)		this->waitfunc = nand_wait;	if (!this->block_bad)		this->block_bad = nand_block_bad;	if (!this->select_chip)		this->select_chip = nand_select_chip;	if (!this->write_byte)		this->write_byte = nand_write_byte;	if (!this->read_byte)		this->read_byte = nand_read_byte;	if (!this->write_buf)		this->write_buf = nand_write_buf;	if (!this->read_buf)		this->read_buf = nand_read_buf;	if (!this->verify_buf)		this->verify_buf = nand_verify_buf;	/* Select the device */	this->select_chip(mtd, 0);	/* Send the command for reading device ID */	this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);	/* Read manufacturer and device IDs */	nand_maf_id = this->read_byte(mtd);	nand_dev_id = this->read_byte(mtd);	/* Print and store flash device information */	for (i = 0; nand_flash_ids[i].name != NULL; i++) {		if (nand_dev_id == nand_flash_ids[i].id && !mtd->size) {			mtd->name = nand_flash_ids[i].name;			mtd->erasesize = nand_flash_ids[i].erasesize;			mtd->eccsize = 256;			this->chipshift = nand_flash_ids[i].chipshift;			if (nand_flash_ids[i].page256) {				mtd->oobblock = 256;				mtd->oobsize = 8;				this->page_shift = 8;			} else {				mtd->oobblock = 512;				mtd->oobsize = 16;				this->page_shift = 9;			}			/* Try to identify manufacturer */			for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {				if (nand_manuf_ids[i].id == nand_maf_id)					break;			}				printk (KERN_INFO "NAND device: Manufacturer ID:"				" 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, 				nand_manuf_ids[i].name , mtd->name);			break;		}	}	if (!mtd->name) {		printk (KERN_WARNING "No NAND device found!!!\n");		return 1;	}	for (i=1; i < maxchips; i++) {		this->select_chip(mtd, i);		/* Send the command for reading device ID */		this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);		/* Read manufacturer and device IDs */		if (nand_maf_id != this->read_byte(mtd) ||		    nand_dev_id != this->read_byte(mtd))			break;	}	if (i > 1)		printk(KERN_INFO "%d NAND chips detected\n", i);	mtd->size = (1 << this->chipshift) /* * i when we fix the rest of the code */;	/* 	 * check ECC mode, default to software	 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize	 * fallback to software ECC 	*/	this->eccsize = 256;	/* set default eccsize */		switch (this->eccmode) {	case NAND_ECC_HW3_512: 	case NAND_ECC_HW6_512: 		if (mtd->oobblock == 256) {			printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");			this->eccmode = NAND_ECC_SOFT;			this->calculate_ecc = nand_calculate_ecc;			this->correct_data = nand_correct_data;			break;				} else 			this->eccsize = 512; /* set eccsize to 512 and fall through for function check */	case NAND_ECC_HW3_256:		if (this->calculate_ecc && this->correct_data && this->enable_hwecc)			break;		printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");		BUG();		case NAND_ECC_NONE: 		printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");		this->eccmode = NAND_ECC_NONE;		break;	case NAND_ECC_SOFT:			this->calculate_ecc = nand_calculate_ecc;		this->correct_data = nand_correct_data;		break;	default:		printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);		BUG();		}			/* Initialize state, waitqueue and spinlock */	this->state = FL_READY;	init_waitqueue_head (&this->wq);	spin_lock_init (&this->chip_lock);	/* De-select the device */	this->select_chip(mtd, -1);	/* Fill in remaining MTD driver data */	mtd->type = MTD_NANDFLASH;	mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;	mtd->ecctype = MTD_ECC_SW;	mtd->erase = nand_erase;	mtd->point = NULL;	mtd->unpoint = NULL;	mtd->read = nand_read;	mtd->write = nand_write;	mtd->read_ecc = nand_read_ecc;	mtd->write_ecc = nand_write_ecc;	mtd->read_oob = nand_read_oob;	mtd->write_oob = nand_write_oob;	mtd->readv = NULL;	mtd->writev = nand_writev;	mtd->writev_ecc = nand_writev_ecc;	mtd->sync = nand_sync;	mtd->lock = NULL;	mtd->unlock = NULL;	mtd->suspend = NULL;	mtd->resume = NULL;	mtd->owner = THIS_MODULE;	/* Return happy */	return 0;}EXPORT_SYMBOL (nand_scan);MODULE_LICENSE ("GPL");MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");MODULE_DESCRIPTION ("Generic NAND flash driver code");