/*   -------------------------------------------------------------------------   i2c-algo-ite.c i2c driver algorithms for ITE adapters	          Hai-Pao Fan, MontaVista Software, Inc.   hpfan@mvista.com or source@mvista.com   Copyright 2000 MontaVista Software Inc.   ---------------------------------------------------------------------------   This file was highly leveraged from i2c-algo-pcf.c, which was created   by Simon G. Vogl and Hans Berglund:     Copyright (C) 1995-1997 Simon G. Vogl                   1998-2000 Hans Berglund    This program is free software; you can redistribute it and/or modify    it under the terms of the GNU General Public License as published by    the Free Software Foundation; either version 2 of the License, or    (at your option) any later version.    This program is distributed in the hope that it will be useful,    but WITHOUT ANY WARRANTY; without even the implied warranty of    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    GNU General Public License for more details.    You should have received a copy of the GNU General Public License    along with this program; if not, write to the Free Software    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.		     *//* ------------------------------------------------------------------------- *//* With some changes from Ky鰏ti M鋖kki <kmalkki@cc.hut.fi> and    Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey   <mbailey@littlefeet-inc.com> */#include <linux/kernel.h>#include <linux/module.h>#include <linux/delay.h>#include <linux/slab.h>#include <linux/version.h>#include <linux/init.h>#include <asm/uaccess.h>#include <linux/ioport.h>#include <linux/errno.h>#include <linux/sched.h>#include <linux/i2c.h>#include <linux/i2c-algo-ite.h>#include "i2c-ite.h"#define	PM_DSR		IT8172_PCI_IO_BASE + IT_PM_DSR#define	PM_IBSR		IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04 #define GPIO_CCR	IT8172_PCI_IO_BASE + IT_GPCCR/* ----- global defines ----------------------------------------------- */#define DEB(x) if (i2c_debug>=1) x#define DEB2(x) if (i2c_debug>=2) x#define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/#define DEBPROTO(x) if (i2c_debug>=9) x; 	/* debug the protocol by showing transferred bits */#define DEF_TIMEOUT 16/* debugging - slow down transfer to have a look at the data .. 	*//* I use this with two leds&resistors, each one connected to sda,scl 	*//* respectively. This makes sure that the algorithm works. Some chips   *//* might not like this, as they have an internal timeout of some mils	*//*#define SLO_IO      jif=jiffies;while(jiffies<=jif+i2c_table[minor].veryslow)\                        if (need_resched) schedule();*//* ----- global variables ---------------------------------------------	*/#ifdef SLO_IO	int jif;#endif/* module parameters: */static int i2c_debug=1;static int iic_test=0;	/* see if the line-setting functions work	*/static int iic_scan=0;	/* have a look at what's hanging 'round		*//* --- setting states on the bus with the right timing: ---------------	*/#define get_clock(adap) adap->getclock(adap->data)#define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)#define iic_inw(adap, reg) adap->getiic(adap->data, reg)/* --- other auxiliary functions --------------------------------------	*/static void iic_start(struct i2c_algo_iic_data *adap){	iic_outw(adap,ITE_I2CHCR,ITE_CMD);}static void iic_stop(struct i2c_algo_iic_data *adap){	iic_outw(adap,ITE_I2CHCR,0);	iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);}static void iic_reset(struct i2c_algo_iic_data *adap){	iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);}static int wait_for_bb(struct i2c_algo_iic_data *adap){	int timeout = DEF_TIMEOUT;	short status;	status = iic_inw(adap, ITE_I2CHSR);#ifndef STUB_I2C	while (timeout-- && (status & ITE_I2CHSR_HB)) {		udelay(1000); /* How much is this? */		status = iic_inw(adap, ITE_I2CHSR);	}#endif	if (timeout<=0) {		printk(KERN_ERR "Timeout, host is busy\n");		iic_reset(adap);	}	return(timeout<=0);}/* * Puts this process to sleep for a period equal to timeout  */static inline void iic_sleep(unsigned long timeout){	schedule_timeout( timeout * HZ);}/* After we issue a transaction on the IIC bus, this function * is called.  It puts this process to sleep until we get an interrupt from * from the controller telling us that the transaction we requested in complete. */static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {	int timeout = DEF_TIMEOUT;		timeout = wait_for_bb(adap);	if (timeout) {  		DEB2(printk("Timeout waiting for host not busy\n");)  		return -EIO;	}                           	timeout = DEF_TIMEOUT;	*status = iic_inw(adap, ITE_I2CHSR);#ifndef STUB_I2C	while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {	   adap->waitforpin();	   *status = iic_inw(adap, ITE_I2CHSR);	}#endif	if (timeout <= 0)		return(-1);	else		return(0);}static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status){	int timeout = DEF_TIMEOUT;	*status = iic_inw(adap, ITE_I2CFSR);#ifndef STUB_I2C 	while (timeout-- && (*status & ITE_I2CFSR_FE)) {		udelay(1000);		iic_inw(adap, ITE_I2CFSR);	}#endif	if (timeout <= 0) 		return(-1);	else		return(0);}static int iic_init (struct i2c_algo_iic_data *adap){	short i;	/* Clear bit 7 to set I2C to normal operation mode */	i=iic_inw(adap, PM_DSR)& 0xff7f;	iic_outw(adap, PM_DSR, i);	/* set IT_GPCCR port C bit 2&3 as function 2 */	i = iic_inw(adap, GPIO_CCR) & 0xfc0f;	iic_outw(adap,GPIO_CCR,i);	/* Clear slave address/sub-address */	iic_outw(adap,ITE_I2CSAR, 0);	iic_outw(adap,ITE_I2CSSAR, 0);	/* Set clock counter register */	iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));	/* Set START/reSTART/STOP time registers */	iic_outw(adap,ITE_I2CSHDR, 0x0a);	iic_outw(adap,ITE_I2CRSUR, 0x0a);	iic_outw(adap,ITE_I2CPSUR, 0x0a);	/* Enable interrupts on completing the current transaction */	iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);	/* Clear transfer count */	iic_outw(adap,ITE_I2CFBCR, 0x0);	DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",		iic_inw(adap, ITE_I2CHSR)));	return 0;}/* * Sanity check for the adapter hardware - check the reaction of * the bus lines only if it seems to be idle. */static int test_bus(struct i2c_algo_iic_data *adap, char *name) {#if 0	int scl,sda;	sda=getsda(adap);	if (adap->getscl==NULL) {		printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");		return 0;			}	scl=getscl(adap);	printk("test_bus: Adapter: %s scl: %d  sda: %d -- testing...\n",	name,getscl(adap),getsda(adap));	if (!scl || !sda ) {		printk("test_bus: %s seems to be busy.\n",adap->name);		goto bailout;	}	sdalo(adap);	printk("test_bus:1 scl: %d  sda: %d \n",getscl(adap),	       getsda(adap));	if ( 0 != getsda(adap) ) {		printk("test_bus: %s SDA stuck high!\n",name);		sdahi(adap);		goto bailout;	}	if ( 0 == getscl(adap) ) {		printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",			name);		goto bailout;	}			sdahi(adap);	printk("test_bus:2 scl: %d  sda: %d \n",getscl(adap),	       getsda(adap));	if ( 0 == getsda(adap) ) {		printk("test_bus: %s SDA stuck low!\n",name);		sdahi(adap);		goto bailout;	}	if ( 0 == getscl(adap) ) {		printk("test_bus: %s SCL unexpected low while SDA high!\n",		       adap->name);	goto bailout;	}	scllo(adap);	printk("test_bus:3 scl: %d  sda: %d \n",getscl(adap),	       getsda(adap));	if ( 0 != getscl(adap) ) {		sclhi(adap);		goto bailout;	}	if ( 0 == getsda(adap) ) {		printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",			name);		goto bailout;	}	sclhi(adap);	printk("test_bus:4 scl: %d  sda: %d \n",getscl(adap),	       getsda(adap));	if ( 0 == getscl(adap) ) {		printk("test_bus: %s SCL stuck low!\n",name);		sclhi(adap);		goto bailout;	}	if ( 0 == getsda(adap) ) {		printk("test_bus: %s SDA unexpected low while SCL high!\n",			name);		goto bailout;	}	printk("test_bus: %s passed test.\n",name);	return 0;bailout:	sdahi(adap);	sclhi(adap);	return -ENODEV;#endif	return (0);}/* ----- Utility functions *//* Verify the device we want to talk to on the IIC bus really exists. */static inline int try_address(struct i2c_algo_iic_data *adap,		       unsigned int addr, int retries){	int i, ret = -1;	short status;	for (i=0;i<retries;i++) {		iic_outw(adap, ITE_I2CSAR, addr);		iic_start(adap);		if (wait_for_pin(adap, &status) == 0) {			if ((status & ITE_I2CHSR_DNE) == 0) { 				iic_stop(adap);				iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);				ret=1;				break;	/* success! */			}		}		iic_stop(adap);		udelay(adap->udelay);	}	DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,	                   addr));	return ret;}static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,                         int count){	struct i2c_algo_iic_data *adap = i2c_adap->algo_data;	int wrcount=0, timeout;	short status;	int loops, remainder, i, j;	union {		char byte[2];		unsigned short word;	} tmp;   	iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);	count--;	if (count == 0)		return -EIO;	loops =  count / 32;		/* 32-byte FIFO */	remainder = count % 32;	if(loops) {		for(i=0; i<loops; i++) {			iic_outw(adap, ITE_I2CFBCR, 32);			for(j=0; j<32/2; j++) {				tmp.byte[1] = buf[wrcount++];				tmp.byte[0] = buf[wrcount++];				iic_outw(adap, ITE_I2CFDR, tmp.word); 			}			/* status FIFO overrun */			iic_inw(adap, ITE_I2CFSR);			iic_inw(adap, ITE_I2CFBCR);			iic_outw(adap, ITE_I2CHCR, ITE_WRITE);	/* Issue WRITE command */			/* Wait for transmission to complete */			timeout = wait_for_pin(adap, &status);			if(timeout) {				iic_stop(adap);				printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);				return -EREMOTEIO; /* got a better one ?? */     	}			if (status & ITE_I2CHSR_DB) {				iic_stop(adap);				printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);				return -EREMOTEIO; /* got a better one ?? */			}		}	}	if(remainder) {		iic_outw(adap, ITE_I2CFBCR, remainder);		for(i=0; i<remainder/2; i++) {			tmp.byte[1] = buf[wrcount++];			tmp.byte[0] = buf[wrcount++];			iic_outw(adap, ITE_I2CFDR, tmp.word);		}		/* status FIFO overrun */		iic_inw(adap, ITE_I2CFSR);		iic_inw(adap, ITE_I2CFBCR);		iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */		timeout = wait_for_pin(adap, &status);		if(timeout) {			iic_stop(adap);			printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);			return -EREMOTEIO; /* got a better one ?? */		}#ifndef STUB_I2C		if (status & ITE_I2CHSR_DB) { 			iic_stop(adap);			printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);			return -EREMOTEIO; /* got a better one ?? */		}#endif	}	iic_stop(adap);	return wrcount;}static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,	int sread){	int rdcount=0, i, timeout;	short status;	struct i2c_algo_iic_data *adap = i2c_adap->algo_data;	int loops, remainder, j;	union {		char byte[2];		unsigned short word;	} tmp;			loops = count / 32;				/* 32-byte FIFO */	remainder = count % 32;	if(loops) {		for(i=0; i<loops; i++) {			iic_outw(adap, ITE_I2CFBCR, 32);			if (sread)				iic_outw(adap, ITE_I2CHCR, ITE_SREAD);			else				iic_outw(adap, ITE_I2CHCR, ITE_READ);		/* Issue READ command */