?? makehex.vhd
字號:
variable d0,d1,d2,d3 : std_logic_vector(72 downto 0);
variable ll : LINE;
variable FSTATUS : FILE_OPEN_STATUS;
variable filename : string(1 to 14);
variable filenameA : string(1 to 15);
variable filenameC : string(1 to 12);
variable filenameNmem : string(1 to 12);
variable filenameNhex : string(1 to 12);
variable str : string(1 to 14);
variable strnvm : string(1 to 40);
variable dbytes : integer_array (0 to 511);
variable nvmaddr : integer;
variable NVMBYTES : integer;
variable NVMWIDTH : integer;
variable bytes : byte_arrayx(0 to 31);
variable hexaddr : integer;
variable hexstr : string(1 to 80);
begin
wait for 10 ns;
if not enable then
wait;
end if;
if RAMWIDTH<=32 then
NVMBYTES := RAMDEPTH * 4;
else
NVMBYTES := RAMDEPTH * 8;
end if;
printf("Creating the Memory Files ID=%d TM=%d",fmt(ID)&fmt(TESTMODE));
printf("Generator version VHDL 2.3.0 ");
printf("Memory Information ");
printf(" Core Configuration AW %d DW %d SW %d",fmt(AWIDTH)&fmt(DWIDTH)&fmt(SWIDTH));
if NROWS>9 or NCOLS>9 then
printf("Not Creating RAM Initialization files - too many instructions");
else
printf("Generating RAM Files");
printf(" Total RAM size %d x %d",fmt(RAMDEPTH)&fmt(RAMWIDTH));
printf(" No of Rows %d No Columns %d ",fmt(NROWS)&fmt(NCOLS));
printf(" No of 512x9 RAM Blocks %d ",fmt(NRAMS));
printf(" Initialization RAM size %d x 9",fmt(RIDEPTH));
printf(" Initialization Address Port Width %d ",fmt(RIWIDTH));
filenameC := "RAMABC_" & CHARACTER'VAL(ID+48) & ".mem";
file_open(fstatus,FSTRC,filenameC,write_mode);
printf(" Complete Memory Image File %s",fmt(filenameC));
for r in 0 to NROWS-1 loop
for c in 0 to NCOLS-1 loop
filename := "RAMABC_" & CHARACTER'VAL(ID+48) & CHARACTER'VAL(R+48) & CHARACTER'VAL(C+48) & ".mem";
printf(" Individual RAM Image COL %d ROW %d to %s",fmt(c)&fmt(r)&fmt(filename));
for i in 0 to 511 loop
addr := r*512 + i;
dbits := 9*c;
if addr<2**ICWIDTH then
address <= conv_std_logic_vector(addr,ICWIDTH);
wait for 1 ns;
data := INSCOMPRESSED(dbits+8 downto dbits);
else
data := ( others => '0');
end if;
dbytes(i) := conv_integer(data(8 downto 0));
if DEBUG and i<1 then
printf("Full Instruction %58b",fmt(INSTRUCTION));
printf(" Compressed Instruction(w=%d) %58b",fmt(RAMWIDTH)&fmt(INSCOMPRESSED));
printf(" ROW %d COL %d RAM %d=%09b",fmt(r)&fmt(c)&fmt(i)&fmt(data(8 downto 0)));
end if;
end loop;
file_open(fstatus,FSTR,filename,write_mode);
if not (fstatus=open_ok) then
assert FALSE report " Failed to open Memory File " & filename severity FAILURE;
end if;
for i in 0 to 511 loop
sprintf(str,"%09b",fmt(dbytes(i)));
write( ll , str(1 to 9) );
writeline(FSTR, ll);
write( ll , str(1 to 9) );
writeline(FSTRC, ll);
end loop;
file_close( FSTR);
if apa then
filenameA := "RAMABC_" & CHARACTER'VAL(ID+48) & CHARACTER'VAL(R+48) & CHARACTER'VAL(C+48) & "L.mem";
file_open(fstatus,FSTR,filenameA,write_mode);
for i in 0 to 255 loop
sprintf(str,"%09b",fmt(dbytes(i)));
write( ll , str(1 to 9) );
writeline(FSTR, ll);
end loop;
file_close( FSTR);
filenameA := "RAMABC_" & CHARACTER'VAL(ID+48) & CHARACTER'VAL(R+48) & CHARACTER'VAL(C+48) & "H.mem";
file_open(fstatus,FSTR,filenameA,write_mode);
for i in 256 to 511 loop
sprintf(str,"%09b",fmt(dbytes(i)));
write( ll , str(1 to 9) );
writeline(FSTR, ll);
end loop;
file_close( FSTR);
end if;
end loop;
end loop;
file_close(FSTRC);
end if;
NVMWIDTH := 32;
if RAMWIDTH>32 then
NVMWIDTH := 64;
end if;
printf("Generating NVM Files");
filenameNhex := "NVMABC_" & CHARACTER'VAL(ID+48) & ".hex";
file_open(fstatus,Fhex,filenameNhex,write_mode);
filenameNmem := "NVMABC_" & CHARACTER'VAL(ID+48) & ".mem";
file_open(fstatus,Fmem,filenameNmem,write_mode);
printf(" NVM simulation file %s",fmt(filenameNmem));
printf(" NVM programming file %s",fmt(filenameNhex));
printf(" NVM uses %d bytes per instruction (Actual Bits=%0d)",fmt(NVMWIDTH/8)&fmt(RAMWIDTH));
printf(" NVM size %d in byte mode",fmt(RAMDEPTH*NVMWIDTH/8));
printf(" In SmartGen configure a Data Storage Client");
printf(" Start Address 0");
printf(" 8-bits wide");
printf(" %d words",fmt(RAMDEPTH*NVMWIDTH/8));
printf(" Memory Content File %s (Intel Hex)",fmt(filenameNhex));
nvmaddr :=0;
hexaddr :=0;
for i in 0 to RAMDEPTH/4-1 loop
for j in 0 to 3 loop
addr := i*4+j;
address <= conv_std_logic_vector(addr,ICWIDTH);
wait for 1 ns;
dataw := ( others => '0');
dataw(IWWIDTH-1+9 downto 0) := INSCOMPRESSED;
case j is
when 0 => D0 := dataw;
when 1 => D1 := dataw;
when 2 => D2 := dataw;
when 3 => D3 := dataw;
end case;
end loop;
--MEM File Loaded By Simulator
if NVMWIDTH<=32 then
sprintf(strnvm,"000%08x%08x%08x%08x", fmt(d3(31 downto 0))
&fmt(d2(31 downto 0))
&fmt(d1(31 downto 0))
&fmt(d0(31 downto 0)));
write( ll , strnvm(1 to 32+3) );
writeline(Fmem, ll);
nvmaddr := nvmaddr +1;
else
sprintf(strnvm,"000%08x%08x%08x%08x", fmt(d1(63 downto 32))
&fmt(d1(31 downto 0))
&fmt(d0(63 downto 32))
&fmt(d0(31 downto 0)));
write( ll , strnvm(1 to 32+3) );
writeline(Fmem, ll);
sprintf(strnvm,"000%08x%08x%08x%08x", fmt(d3(63 downto 32))
&fmt(d3(31 downto 0))
&fmt(d2(63 downto 32))
&fmt(d2(31 downto 0)));
write( ll , strnvm(1 to 32+3) );
writeline(Fmem, ll);
nvmaddr := nvmaddr +2;
end if;
if nvmaddr-8*(nvmaddr/8)=0 then
sprintf(strnvm,"@000000000000000000000000000000%04h",fmt(nvmaddr*2));
write( ll , strnvm(1 to 35) );
writeline(Fmem, ll);
end if;
-- Hex file loaded by Programmer
if (65536*(hexaddr/65536)=hexaddr) and hexaddr>0 then
hexstr := create_addr_ihex(hexaddr); -- insert address record on 64K boundaries
write( ll , hexstr(1 to 15) );
writeline(Fhex, ll);
end if;
if NVMWIDTH<=32 then
bytes(0) := d0( 7 downto 0);
bytes(1) := d0(15 downto 8);
bytes(2) := d0(23 downto 16);
bytes(3) := d0(31 downto 24);
bytes(4) := d1( 7 downto 0);
bytes(5) := d1(15 downto 8);
bytes(6) := d1(23 downto 16);
bytes(7) := d1(31 downto 24);
bytes(8) := d2( 7 downto 0);
bytes(9) := d2(15 downto 8);
bytes(10) := d2(23 downto 16);
bytes(11) := d2(31 downto 24);
bytes(12) := d3( 7 downto 0);
bytes(13) := d3(15 downto 8);
bytes(14) := d3(23 downto 16);
bytes(15) := d3(31 downto 24);
hexstr := create_ihex(16,hexaddr,bytes);
hexaddr := hexaddr + 16;
write( ll , hexstr(1 to 2*16+11) );
writeline(Fhex, ll);
else
bytes(0) := d0( 7 downto 0);
bytes(1) := d0(15 downto 8);
bytes(2) := d0(23 downto 16);
bytes(3) := d0(31 downto 24);
bytes(4) := d0(39 downto 32);
bytes(5) := d0(47 downto 40);
bytes(6) := d0(55 downto 48);
bytes(7) := d0(63 downto 56);
bytes(8) := d1( 7 downto 0);
bytes(9) := d1(15 downto 8);
bytes(10) := d1(23 downto 16);
bytes(11) := d1(31 downto 24);
bytes(12) := d1(39 downto 32);
bytes(13) := d1(47 downto 40);
bytes(14) := d1(55 downto 48);
bytes(15) := d1(63 downto 56);
hexstr := create_ihex(16,hexaddr,bytes);
write( ll , hexstr(1 to 2*16+11) );
writeline(Fhex, ll);
hexaddr := hexaddr + 16;
bytes(0) := d2( 7 downto 0);
bytes(1) := d2(15 downto 8);
bytes(2) := d2(23 downto 16);
bytes(3) := d2(31 downto 24);
bytes(4) := d2(39 downto 32);
bytes(5) := d2(47 downto 40);
bytes(6) := d2(55 downto 48);
bytes(7) := d2(63 downto 56);
bytes(8) := d3( 7 downto 0);
bytes(9) := d3(15 downto 8);
bytes(10) := d3(23 downto 16);
bytes(11) := d3(31 downto 24);
bytes(12) := d3(39 downto 32);
bytes(13) := d3(47 downto 40);
bytes(14) := d3(55 downto 48);
bytes(15) := d3(63 downto 56);
hexstr := create_ihex(16,hexaddr,bytes);
write( ll , hexstr(1 to 2*16+11) );
writeline(Fhex, ll);
hexaddr := hexaddr + 16;
end if;
end loop;
hexstr := ( others => NUL);
hexstr(1 to 11) := ":00000001FF";
write( ll ,hexstr(1 to 11));
writeline(Fhex, ll);
file_close(Fhex);
file_close(Fmem);
printf("Finished Memory File Creation");
printf(" ");
wait;
end process;
end RTL;
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