/* * BK Id: SCCS/s.pmac_pci.c 1.31 01/20/02 23:53:11 benh *//* * Support for PCI bridges found on Power Macintoshes. * At present the "bandit" and "chaos" bridges are supported. * Fortunately you access configuration space in the same * way with either bridge. * * Copyright (C) 1997 Paul Mackerras (paulus@cs.anu.edu.au) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */#include <linux/kernel.h>#include <linux/pci.h>#include <linux/delay.h>#include <linux/string.h>#include <linux/init.h>#include <linux/bootmem.h>#include <asm/sections.h>#include <asm/io.h>#include <asm/prom.h>#include <asm/pci-bridge.h>#include <asm/machdep.h>#include <asm/pmac_feature.h>#include "pci.h"#undef DEBUGstatic void add_bridges(struct device_node *dev);/* XXX Could be per-controller, but I don't think we risk anything by * assuming we won't have both UniNorth and Bandit */static int has_uninorth;/* * Magic constants for enabling cache coherency in the bandit/PSX bridge. */#define BANDIT_DEVID_2	8#define BANDIT_REVID	3#define BANDIT_DEVNUM	11#define BANDIT_MAGIC	0x50#define BANDIT_COHERENT	0x40static int __initfixup_one_level_bus_range(struct device_node *node, int higher){	for (; node != 0;node = node->sibling) {		int * bus_range;		unsigned int *class_code;					int len;		/* For PCI<->PCI bridges or CardBus bridges, we go down */		class_code = (unsigned int *) get_property(node, "class-code", 0);		if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))			continue;		bus_range = (int *) get_property(node, "bus-range", &len);		if (bus_range != NULL && len > 2 * sizeof(int)) {			if (bus_range[1] > higher)				higher = bus_range[1];		}		higher = fixup_one_level_bus_range(node->child, higher);	}	return higher;}/* This routine fixes the "bus-range" property of all bridges in the * system since they tend to have their "last" member wrong on macs *  * Note that the bus numbers manipulated here are OF bus numbers, they * are not Linux bus numbers. */static void __initfixup_bus_range(struct device_node *bridge){	int * bus_range;	int len;		/* Lookup the "bus-range" property for the hose */			bus_range = (int *) get_property(bridge, "bus-range", &len);	if (bus_range == NULL || len < 2 * sizeof(int)) {		printk(KERN_WARNING "Can't get bus-range for %s\n",			       bridge->full_name);		return;	}	bus_range[1] = fixup_one_level_bus_range(bridge->child, bus_range[1]);}/* * Apple MacRISC (UniNorth, Bandit, Chaos) PCI controllers. *  * The "Bandit" version is present in all early PCI PowerMacs, * and up to the first ones using Grackle. Some machines may * have 2 bandit controllers (2 PCI busses). *  * "Chaos" is used in some "Bandit"-type machines as a bridge * for the separate display bus. It is accessed the same * way as bandit, but cannot be probed for devices. It therefore * has its own config access functions. * * The "UniNorth" version is present in all Core99 machines * (iBook, G4, new IMacs, and all the recent Apple machines). * It contains 3 controllers in one ASIC. */#define MACRISC_CFA0(devfn, off)	\	((1 << (unsigned long)PCI_SLOT(dev_fn)) \	| (((unsigned long)PCI_FUNC(dev_fn)) << 8) \	| (((unsigned long)(off)) & 0xFCUL))#define MACRISC_CFA1(bus, devfn, off)	\	((((unsigned long)(bus)) << 16) \	|(((unsigned long)(devfn)) << 8) \	|(((unsigned long)(off)) & 0xFCUL) \	|1UL)	static unsigned int __pmacmacrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset){	unsigned int caddr;		if (bus == hose->first_busno) {		if (dev_fn < (11 << 3))			return 0;		caddr = MACRISC_CFA0(dev_fn, offset);	} else		caddr = MACRISC_CFA1(bus, dev_fn, offset);		/* Uninorth will return garbage if we don't read back the value ! */	do {		out_le32(hose->cfg_addr, caddr);	} while(in_le32(hose->cfg_addr) != caddr);	offset &= has_uninorth ? 0x07 : 0x03;	return (unsigned int)(hose->cfg_data) + (unsigned int)offset;}#define cfg_read(val, addr, type, op, op2)	\	*val = op((type)(addr))#define cfg_write(val, addr, type, op, op2)	\	op((type *)(addr), (val)); (void) op2((type *)(addr))#define cfg_read_bad(val, size)		*val = bad_##size;#define cfg_write_bad(val, size)#define bad_byte	0xff#define bad_word	0xffff#define bad_dword	0xffffffffU#define MACRISC_PCI_OP(rw, size, type, op, op2)				    \static int __pmac							    \macrisc_##rw##_config_##size(struct pci_dev *dev, int off, type val)	    \{									    \	struct pci_controller *hose = dev->sysdata;			    \	unsigned int addr;						    \									    \	addr = macrisc_cfg_access(hose, dev->bus->number, dev->devfn, off); \	if (!addr) {							    \		cfg_##rw##_bad(val, size)				    \		return PCIBIOS_DEVICE_NOT_FOUND;			    \	}								    \	cfg_##rw(val, addr, type, op, op2);				    \	return PCIBIOS_SUCCESSFUL;					    \}MACRISC_PCI_OP(read, byte, u8 *, in_8, x)MACRISC_PCI_OP(read, word, u16 *, in_le16, x)MACRISC_PCI_OP(read, dword, u32 *, in_le32, x)MACRISC_PCI_OP(write, byte, u8, out_8, in_8)MACRISC_PCI_OP(write, word, u16, out_le16, in_le16)MACRISC_PCI_OP(write, dword, u32, out_le32, in_le32)static struct pci_ops macrisc_pci_ops ={	macrisc_read_config_byte,	macrisc_read_config_word,	macrisc_read_config_dword,	macrisc_write_config_byte,	macrisc_write_config_word,	macrisc_write_config_dword};/* * Verifiy that a specific (bus, dev_fn) exists on chaos */static int __pmacchaos_validate_dev(struct pci_dev *dev, int offset){	if(pci_device_to_OF_node(dev) == 0)		return PCIBIOS_DEVICE_NOT_FOUND;	if((dev->vendor == 0x106b) && (dev->device == 3) && (offset >= 0x10) &&	    (offset != 0x14) && (offset != 0x18) && (offset <= 0x24)) {		return PCIBIOS_BAD_REGISTER_NUMBER;	}	return PCIBIOS_SUCCESSFUL;}#define CHAOS_PCI_OP(rw, size, type)					\static int __pmac							\chaos_##rw##_config_##size(struct pci_dev *dev, int off, type val)	\{									\	int result = chaos_validate_dev(dev, off);			\	if(result == PCIBIOS_BAD_REGISTER_NUMBER) {			\		cfg_##rw##_bad(val, size)				\		return PCIBIOS_BAD_REGISTER_NUMBER;			\	}								\	if(result == PCIBIOS_SUCCESSFUL)				\		return macrisc_##rw##_config_##size(dev, off, val);	\	return result;							\}CHAOS_PCI_OP(read, byte, u8 *)CHAOS_PCI_OP(read, word, u16 *)CHAOS_PCI_OP(read, dword, u32 *)CHAOS_PCI_OP(write, byte, u8)CHAOS_PCI_OP(write, word, u16)CHAOS_PCI_OP(write, dword, u32) static struct pci_ops chaos_pci_ops ={	chaos_read_config_byte,	chaos_read_config_word,	chaos_read_config_dword,	chaos_write_config_byte,	chaos_write_config_word,	chaos_write_config_dword};/* * For a bandit bridge, turn on cache coherency if necessary. * N.B. we could clean this up using the hose ops directly. */static void __initinit_bandit(struct pci_controller *bp){	unsigned int vendev, magic;	int rev;	/* read the word at offset 0 in config space for device 11 */	out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID);	udelay(2);	vendev = in_le32((volatile unsigned int *)bp->cfg_data);	if (vendev == (PCI_DEVICE_ID_APPLE_BANDIT << 16) + 			PCI_VENDOR_ID_APPLE) {		/* read the revision id */		out_le32(bp->cfg_addr,			 (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);		udelay(2);		rev = in_8(bp->cfg_data);		if (rev != BANDIT_REVID)			printk(KERN_WARNING			       "Unknown revision %d for bandit at %08lx\n",			       rev, bp->io_base_phys);	} else if (vendev != (BANDIT_DEVID_2 << 16) + PCI_VENDOR_ID_APPLE) {		printk(KERN_WARNING "bandit isn't? (%x)\n", vendev);		return;	}	/* read the revision id */	out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);	udelay(2);	rev = in_8(bp->cfg_data);	if (rev != BANDIT_REVID)		printk(KERN_WARNING "Unknown revision %d for bandit at %08lx\n",		       rev, bp->io_base_phys);	/* read the word at offset 0x50 */	out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);	udelay(2);	magic = in_le32((volatile unsigned int *)bp->cfg_data);	if ((magic & BANDIT_COHERENT) != 0)		return;	magic |= BANDIT_COHERENT;	udelay(2);	out_le32((volatile unsigned int *)bp->cfg_data, magic);	printk(KERN_INFO "Cache coherency enabled for bandit/PSX at %08lx\n",	       bp->io_base_phys);}/* * Tweak the PCI-PCI bridge chip on the blue & white G3s. */static void __initinit_p2pbridge(void){	struct device_node *p2pbridge;	struct pci_controller* hose;	u8 bus, devfn;	u16 val;	/* XXX it would be better here to identify the specific	   PCI-PCI bridge chip we have. */	if ((p2pbridge = find_devices("pci-bridge")) == 0	    || p2pbridge->parent == NULL	    || strcmp(p2pbridge->parent->name, "pci") != 0)		return;	if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) {#ifdef DEBUG		printk("Can't find PCI infos for PCI<->PCI bridge\n");#endif				return;	}	/* Warning: At this point, we have not yet renumbered all busses. 	 * So we must use OF walking to find out hose	 */	hose = pci_find_hose_for_OF_device(p2pbridge);	if (!hose) {#ifdef DEBUG