// \Equal0~231  = cout[23] & cout[20] & !cout[22] & !cout[21]

	.dataa(cout[23]),
	.datab(cout[20]),
	.datac(cout[22]),
	.datad(cout[21]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal0~231 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Equal0~231_I .clock_enable_mode = "false";
defparam \Equal0~231_I .lut_mask = "0008";
defparam \Equal0~231_I .operation_mode = "normal";
defparam \Equal0~231_I .output_mode = "comb_only";
defparam \Equal0~231_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC2_D32
flex10ke_lcell \cout[19]~I (
// Equation(s):
// cout[19] = DFFEA(\Add0|adder|result_node|cs_buffer [19] & !\Equal0~235 , GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(\Add0|adder|result_node|cs_buffer [19]),
	.datad(\Equal0~235 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(cout[19]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \cout[19]~I .clock_enable_mode = "false";
defparam \cout[19]~I .lut_mask = "00F0";
defparam \cout[19]~I .operation_mode = "normal";
defparam \cout[19]~I .output_mode = "reg_only";
defparam \cout[19]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D33
flex10ke_lcell \cout[18]~I (
// Equation(s):
// cout[18] = DFFEA(\Add0|adder|result_node|cs_buffer [18], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add0|adder|result_node|cs_buffer [18]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(cout[18]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \cout[18]~I .clock_enable_mode = "false";
defparam \cout[18]~I .lut_mask = "FF00";
defparam \cout[18]~I .operation_mode = "normal";
defparam \cout[18]~I .output_mode = "reg_only";
defparam \cout[18]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D9
flex10ke_lcell \cout[17]~I (
// Equation(s):
// cout[17] = DFFEA(\Add0|adder|result_node|cs_buffer [17], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add0|adder|result_node|cs_buffer [17]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(cout[17]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \cout[17]~I .clock_enable_mode = "false";
defparam \cout[17]~I .lut_mask = "FF00";
defparam \cout[17]~I .operation_mode = "normal";
defparam \cout[17]~I .output_mode = "reg_only";
defparam \cout[17]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D34
flex10ke_lcell \cout[16]~I (
// Equation(s):
// cout[16] = DFFEA(\Add0|adder|result_node|cs_buffer [16], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add0|adder|result_node|cs_buffer [16]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(cout[16]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \cout[16]~I .clock_enable_mode = "false";
defparam \cout[16]~I .lut_mask = "FF00";
defparam \cout[16]~I .operation_mode = "normal";
defparam \cout[16]~I .output_mode = "reg_only";
defparam \cout[16]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC6_D32
flex10ke_lcell \Equal0~232_I (
// Equation(s):
// \Equal0~232  = cout[19] & !cout[18] & !cout[17] & !cout[16]

	.dataa(cout[19]),
	.datab(cout[18]),
	.datac(cout[17]),
	.datad(cout[16]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal0~232 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Equal0~232_I .clock_enable_mode = "false";
defparam \Equal0~232_I .lut_mask = "0002";
defparam \Equal0~232_I .operation_mode = "normal";
defparam \Equal0~232_I .output_mode = "comb_only";
defparam \Equal0~232_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_D32
flex10ke_lcell \Equal0~235_I (
// Equation(s):
// \Equal0~235  = \Equal0~231  & \Equal0~232  & \Equal0~246  & \Equal0~247 

	.dataa(\Equal0~231 ),
	.datab(\Equal0~232 ),
	.datac(\Equal0~246 ),
	.datad(\Equal0~247 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal0~235 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Equal0~235_I .clock_enable_mode = "false";
defparam \Equal0~235_I .lut_mask = "8000";
defparam \Equal0~235_I .operation_mode = "normal";
defparam \Equal0~235_I .output_mode = "comb_only";
defparam \Equal0~235_I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_F17
flex10ke_lcell \Add2|adder|result_node|cs_buffer[1]~I (
// Equation(s):
// \Add2|adder|result_node|cs_buffer [1] = seconds[1] $ \Add2|adder|result_node|cout [0]
// \Add2|adder|result_node|cout [1] = CARRY(seconds[1] & \Add2|adder|result_node|cout [0])

	.dataa(vcc),
	.datab(seconds[1]),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(\Add2|adder|result_node|cout [0]),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add2|adder|result_node|cs_buffer [1]),
	.regout(),
	.cout(\Add2|adder|result_node|cout [1]),
	.cascout());
// synopsys translate_off
defparam \Add2|adder|result_node|cs_buffer[1]~I .cin_used = "true";
defparam \Add2|adder|result_node|cs_buffer[1]~I .clock_enable_mode = "false";
defparam \Add2|adder|result_node|cs_buffer[1]~I .lut_mask = "3CC0";
defparam \Add2|adder|result_node|cs_buffer[1]~I .operation_mode = "arithmetic";
defparam \Add2|adder|result_node|cs_buffer[1]~I .output_mode = "comb_only";
defparam \Add2|adder|result_node|cs_buffer[1]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC8_F17
flex10ke_lcell \Add2|adder|unreg_res_node[5]~I (
// Equation(s):
// \Add2|adder|unreg_res_node [5] = \Add2|adder|result_node|cout [4] $ seconds[5]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(seconds[5]),
	.aclr(gnd),
	.aload(gnd),
	.clk(gnd),
	.cin(\Add2|adder|result_node|cout [4]),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add2|adder|unreg_res_node [5]),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \Add2|adder|unreg_res_node[5]~I .cin_used = "true";
defparam \Add2|adder|unreg_res_node[5]~I .clock_enable_mode = "false";
defparam \Add2|adder|unreg_res_node[5]~I .lut_mask = "0FF0";
defparam \Add2|adder|unreg_res_node[5]~I .operation_mode = "normal";
defparam \Add2|adder|unreg_res_node[5]~I .output_mode = "comb_only";
defparam \Add2|adder|unreg_res_node[5]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC4_A9
flex10ke_lcell \couta[16]~I (
// Equation(s):
// couta[16] = DFFEA(\Add1|adder|result_node|cs_buffer [16], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [16]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[16]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[16]~I .clock_enable_mode = "false";
defparam \couta[16]~I .lut_mask = "FF00";
defparam \couta[16]~I .operation_mode = "normal";
defparam \couta[16]~I .output_mode = "reg_only";
defparam \couta[16]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A13
flex10ke_lcell \couta[15]~I (
// Equation(s):
// couta[15] = DFFEA(\Add1|adder|result_node|cs_buffer [15], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [15]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[15]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[15]~I .clock_enable_mode = "false";
defparam \couta[15]~I .lut_mask = "FF00";
defparam \couta[15]~I .operation_mode = "normal";
defparam \couta[15]~I .output_mode = "reg_only";
defparam \couta[15]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A11
flex10ke_lcell \couta[14]~I (
// Equation(s):
// couta[14] = DFFEA(\Add1|adder|result_node|cs_buffer [14], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [14]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[14]),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \couta[14]~I .clock_enable_mode = "false";
defparam \couta[14]~I .lut_mask = "FF00";
defparam \couta[14]~I .operation_mode = "normal";
defparam \couta[14]~I .output_mode = "reg_only";
defparam \couta[14]~I .packed_mode = "false";
// synopsys translate_on

// atom is at LC1_A10
flex10ke_lcell \couta[13]~I (
// Equation(s):
// couta[13] = DFFEA(\Add1|adder|result_node|cs_buffer [13], GLOBAL(\clk~dataout ), , , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\Add1|adder|result_node|cs_buffer [13]),
	.aclr(gnd),
	.aload(gnd),
	.clk(\clk~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(couta[13]),
	.cout(),