?? bbu_dd_chipcsl.h
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\******************************************************************************/
extern far cregister volatile Uint32 NRP;
#define CHIP_NRP_DEFAULT 0x00000000u
#define CHIP_NRP_NRP_MASK 0xFFFFFFFFu
#define CHIP_NRP_NRP_SHIFT 0x00000000u
#define CHIP_NRP_NRP_DEFAULT 0x00000000u
/******************************************************************************\
* AMR - addressing mode register
*
* BK1[25:21] - rw, Specifies block1 size to use for a circular buffer
* BK0[20:16] - rw, Specifies block0 size to use for a circular buffer
* B7MODE[15:14] - rw, Set B7 address modification mode: linear or circular
* B6MODE[13:12] - rw, Set B6 address modification mode: linear or circular
* B5MODE[11:10] - rw, Set B5 address modification mode: linear or circular
* B4MODE[9:8] - rw, Set B4 address modification mode: linear or circular
* A7MODE[7:6] - rw, Set A7 address modification mode: linear or circular
* A6MODE[5:4] - rw, Set A6 address modification mode: linear or circular
* A5MODE[3:2] - rw, Set A5 address modification mode: linear or circular
* A4MODE[1:0] - rw, Set A4 address modification mode: linear or circular
*
\******************************************************************************/
extern far cregister volatile Uint32 AMR;
#define CHIP_AMR_DEFAULT 0x00000000u
#define CHIP_AMR_BK1_MASK 0x03E00000u
#define CHIP_AMR_BK1_SHIFT 0x00000015u
#define CHIP_AMR_BK1_DEFAULT 0x00000000u
#define CHIP_AMR_BK1_2 0x00000000u
#define CHIP_AMR_BK1_4 0x00000001u
#define CHIP_AMR_BK1_8 0x00000002u
#define CHIP_AMR_BK1_16 0x00000003u
#define CHIP_AMR_BK1_32 0x00000004u
#define CHIP_AMR_BK1_64 0x00000005u
#define CHIP_AMR_BK1_128 0x00000006u
#define CHIP_AMR_BK1_256 0x00000007u
#define CHIP_AMR_BK1_512 0x00000008u
#define CHIP_AMR_BK1_1K 0x00000009u
#define CHIP_AMR_BK1_2K 0x0000000Au
#define CHIP_AMR_BK1_4K 0x0000000Bu
#define CHIP_AMR_BK1_8K 0x0000000Cu
#define CHIP_AMR_BK1_16K 0x0000000Du
#define CHIP_AMR_BK1_32K 0x0000000Eu
#define CHIP_AMR_BK1_64K 0x0000000Fu
#define CHIP_AMR_BK1_128K 0x00000010u
#define CHIP_AMR_BK1_256K 0x00000011u
#define CHIP_AMR_BK1_512K 0x00000012u
#define CHIP_AMR_BK1_1M 0x00000013u
#define CHIP_AMR_BK1_2M 0x00000014u
#define CHIP_AMR_BK1_4M 0x00000015u
#define CHIP_AMR_BK1_8M 0x00000016u
#define CHIP_AMR_BK1_16M 0x00000017u
#define CHIP_AMR_BK1_32M 0x00000018u
#define CHIP_AMR_BK1_64M 0x00000019u
#define CHIP_AMR_BK1_128M 0x0000001Au
#define CHIP_AMR_BK1_256M 0x0000001Bu
#define CHIP_AMR_BK1_512M 0x0000001Cu
#define CHIP_AMR_BK1_1G 0x0000001Du
#define CHIP_AMR_BK1_2G 0x0000001Eu
#define CHIP_AMR_BK1_4G 0x0000001Fu
#define CHIP_AMR_BK0_MASK 0x001F0000u
#define CHIP_AMR_BK0_SHIFT 0x00000010u
#define CHIP_AMR_BK0_DEFAULT 0x00000000u
#define CHIP_AMR_BK0_2 0x00000000u
#define CHIP_AMR_BK0_4 0x00000001u
#define CHIP_AMR_BK0_8 0x00000002u
#define CHIP_AMR_BK0_16 0x00000003u
#define CHIP_AMR_BK0_32 0x00000004u
#define CHIP_AMR_BK0_64 0x00000005u
#define CHIP_AMR_BK0_128 0x00000006u
#define CHIP_AMR_BK0_256 0x00000007u
#define CHIP_AMR_BK0_512 0x00000008u
#define CHIP_AMR_BK0_1K 0x00000009u
#define CHIP_AMR_BK0_2K 0x0000000Au
#define CHIP_AMR_BK0_4K 0x0000000Bu
#define CHIP_AMR_BK0_8K 0x0000000Cu
#define CHIP_AMR_BK0_16K 0x0000000Du
#define CHIP_AMR_BK0_32K 0x0000000Eu
#define CHIP_AMR_BK0_64K 0x0000000Fu
#define CHIP_AMR_BK0_128K 0x00000010u
#define CHIP_AMR_BK0_256K 0x00000011u
#define CHIP_AMR_BK0_512K 0x00000012u
#define CHIP_AMR_BK0_1M 0x00000013u
#define CHIP_AMR_BK0_2M 0x00000014u
#define CHIP_AMR_BK0_4M 0x00000015u
#define CHIP_AMR_BK0_8M 0x00000016u
#define CHIP_AMR_BK0_16M 0x00000017u
#define CHIP_AMR_BK0_32M 0x00000018u
#define CHIP_AMR_BK0_64M 0x00000019u
#define CHIP_AMR_BK0_128M 0x0000001Au
#define CHIP_AMR_BK0_256M 0x0000001Bu
#define CHIP_AMR_BK0_512M 0x0000001Cu
#define CHIP_AMR_BK0_1G 0x0000001Du
#define CHIP_AMR_BK0_2G 0x0000001Eu
#define CHIP_AMR_BK0_4G 0x0000001Fu
#define CHIP_AMR_B7MODE_MASK 0x0000C000u
#define CHIP_AMR_B7MODE_SHIFT 0x0000000Eu
#define CHIP_AMR_B7MODE_DEFAULT 0x00000000u
#define CHIP_AMR_B7MODE_LINEAR 0x00000000u
#define CHIP_AMR_B7MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_B7MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_B6MODE_MASK 0x00003000u
#define CHIP_AMR_B6MODE_SHIFT 0x0000000Cu
#define CHIP_AMR_B6MODE_DEFAULT 0x00000000u
#define CHIP_AMR_B6MODE_LINEAR 0x00000000u
#define CHIP_AMR_B6MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_B6MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_B5MODE_MASK 0x00000C00u
#define CHIP_AMR_B5MODE_SHIFT 0x0000000Au
#define CHIP_AMR_B5MODE_DEFAULT 0x00000000u
#define CHIP_AMR_B5MODE_LINEAR 0x00000000u
#define CHIP_AMR_B5MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_B5MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_B4MODE_MASK 0x00000300u
#define CHIP_AMR_B4MODE_SHIFT 0x00000008u
#define CHIP_AMR_B4MODE_DEFAULT 0x00000000u
#define CHIP_AMR_B4MODE_LINEAR 0x00000000u
#define CHIP_AMR_B4MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_B4MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_A7MODE_MASK 0x000000C0u
#define CHIP_AMR_A7MODE_SHIFT 0x00000006u
#define CHIP_AMR_A7MODE_DEFAULT 0x00000000u
#define CHIP_AMR_A7MODE_LINEAR 0x00000000u
#define CHIP_AMR_A7MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_A7MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_A6MODE_MASK 0x00000030u
#define CHIP_AMR_A6MODE_SHIFT 0x00000004u
#define CHIP_AMR_A6MODE_DEFAULT 0x00000000u
#define CHIP_AMR_A6MODE_LINEAR 0x00000000u
#define CHIP_AMR_A6MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_A6MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_A5MODE_MASK 0x0000000Cu
#define CHIP_AMR_A5MODE_SHIFT 0x00000002u
#define CHIP_AMR_A5MODE_DEFAULT 0x00000000u
#define CHIP_AMR_A5MODE_LINEAR 0x00000000u
#define CHIP_AMR_A5MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_A5MODE_CIRCULAR1 0x00000002u
#define CHIP_AMR_A4MODE_MASK 0x00000003u
#define CHIP_AMR_A4MODE_SHIFT 0x00000000u
#define CHIP_AMR_A4MODE_DEFAULT 0x00000000u
#define CHIP_AMR_A4MODE_LINEAR 0x00000000u
#define CHIP_AMR_A4MODE_CIRCULAR0 0x00000001u
#define CHIP_AMR_A4MODE_CIRCULAR1 0x00000002u
/******************************************************************************\
* Chip Raw Registers Access Macro Definitions
\******************************************************************************/
#define CHIP_CRSET(REG,x) REG =((Uint32)(x))
#define CHIP_CRGET(REG) REG
#define CHIP_CFSET(REG,FIELD,x) CHIP_CRSET(REG, (REG & ~CHIP_##REG##_##FIELD##_MASK) \
| (((Uint32)(x) << CHIP_##REG##_##FIELD##_SHIFT) & CHIP_##REG##_##FIELD##_MASK))
#define CHIP_CFGET(REG,FIELD) (Uint32)((REG & CHIP_##REG##_##FIELD##_MASK) >> CHIP_##REG##_##FIELD##_SHIFT)
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Chip Global Macro Definitions
\******************************************************************************/
#define CHIP_ENDIAN_BIG 0
#define CHIP_ENDIAN_LITTLE 1
#define DEVICE_REVID_103B 0x0000000Fu
#define DEVICE_REVID_103 0x00000001u
#define DEVICE_REVID_110 0x00000002u
#define DEVICE_REVID_200 0x00000003u
#define DEVICE_TYPE_6416 0x00006416u
#define DEVICE_TYPE_6414 0x00006414u
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Chip inline function declarations
\******************************************************************************/
IDECL Uint32 CHIP_getCpuId(void);
IDECL Uint32 CHIP_getRevId(void);
IDECL Uint32 CHIP_getSiliconRevId(void);
IDECL Uint32 CHIP_getDeviceType(void);
IDECL Uint32 CHIP_getEndian(void);
/******************************************************************************\
* Chip inline function definitions
\******************************************************************************/
/* This function returns the CPU ID of the CSR register */
IDECL Uint32 CHIP_getCpuId(void)
{
return CHIP_CFGET(CSR,CPUID);
}
/*----------------------------------------------------------------------------*/
/* This function returns the CPU revision ID of the CSR register */
IDECL Uint32 CHIP_getRevId(void)
{
return CHIP_CFGET(CSR,REVID);
}
/*----------------------------------------------------------------------------*/
/* This function returns the Device Silicon revision ID */
/* DEVICE_REV[19:16] = 1111b, 1.03 or earlier */
/* = 0001b, 1.03 */
/* = 0010b or 0000b, 1.1 */
/* = 0011b, 2.0 */
IDECL Uint32 CHIP_getSiliconRevId(void)
{
return (( 0x000F0000 & (*(volatile Uint32*)(0x01B00200)))>>16);
}
/*----------------------------------------------------------------------------*/
/* This function returns the Device Type */
/* DEVICE_TYPE[15:0] = 0x6416, TMS320C6416 */
/* = 0x6414, TMS320C6414 */
IDECL Uint32 CHIP_getDeviceType(void)
{
return ( 0x0000FFFF & (*(volatile Uint32*)(0x01B00200)));
}
/*----------------------------------------------------------------------------*/
/* Returns the current endian mode of the device */
IDECL Uint32 CHIP_getEndian(void)
{
return CHIP_CFGET(CSR,EN);
}
/*----------------------------------------------------------------------------*/
#endif /* _BBU_DD_CHIPCSL_H_ */
/******************************************************************************\
* End of BBU_DD_ChipCsl.h
\******************************************************************************/
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