?? bbu_dd_post.h
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/*******************************************************************************
* COPYRIGHT (C) 中國普天研究院 *
********************************************************************************
* 源文件名: BBU_DD_Post.h *
* 功能描述：POST Testing Macro Definitions and Global Variabal declarations *
* 編寫者：louyajun *
* 版本：1.0.0 *
* 編制日期：07/21/2004 *
* 說明： *
* 修改歷史： *
* *
*******************************************************************************/
#ifndef _BBU_DD_POST_H_
#define _BBU_DD_POST_H_
#include "BBU_DD_Stdinc.h"
#include "BBU_DD_EdmaCsl.h"
#include "BBU_DD_McbspCsl.h"
#include "BBU_DD_TimerCsl.h"
#include "BBU_DD_GpioCsl.h"
/******************************************************************************\
* POST Macro Definitions
\******************************************************************************/
#define POST_CHIP_CORE_ERROR 0x81000000u
#define POST_CHIP_CPUID_ERROR 0x80001100u
#define POST_CHIP_REVID_ERROR 0x80001101u
#define POST_CHIP_SILICONREVID_ERROR 0x80001102u
#define POST_CHIP_DEVICETYPE_ERROR 0x80001103u
#define POST_CHIP_ENDIANMODE_ERROR 0x80001104u
#define POST_GPIO_INIT_ERROR 0x80002000u
#define POST_GPIO_DSPID_ERROR 0x80002001u
#define POST_L2MEM_ERR 0x80002010u
#define POST_EMIFA_DPRAM_ERR 0x80002020u
#define POST_EMIFA_SDRAM_ERR 0x80002021u
#define POST_MCBSP0_INIT_ERR 0x80002030u
#define POST_MCBSP1_INIT_ERR 0x80002031u
#define POST_MCBSP2_INIT_ERR 0x80002032u
#define POST_MCBSP0_ERR 0x80002033u
#define POST_MCBSP1_ERR 0x80002034u
#define POST_MCBSP2_ERR 0x80002035u
#define POST_TIMER0_INIT_ERR 0x80002040u
#define POST_TIMER1_INIT_ERR 0x80002041u
#define POST_TIMER2_INIT_ERR 0x80002042u
#define POST_TIMER0_ERR 0x80002043u
#define POST_TIMER1_ERR 0x80002044u
#define POST_TIMER2_ERR 0x80002045u
#define POST_5MSFRAME_ERR 0x80002050u
#define POST_10MSSLOTREADY_ERR 0x80002051u
#define POST_OK 0
#define POST_ERROR -1
#define POST_TEST_MODE_DSK 0
#define POST_TEST_MODE_CPB 1
#define POST_TEST_MODE POST_TEST_MODE_CPB
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Macro definitions for McBSP
\******************************************************************************/
#define MCBSP_TX_BUFFER_SIZE 960
#define MCBSP_RX_BUFFER_SIZE 16
#define MCBSP_LOOPBACK_MODE_INT 0
#define MCBSP_LOOPBACK_MODE_EXT 1
#define MCBSP_LOOPBACK_MODE MCBSP_LOOPBACK_MODE_EXT
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Macro definitions for L2 SRAM memory testing
\******************************************************************************/
#define L2MEM_SRAM_SIZE 0x00100000 /* on-chip memory (Bytes)*/
#define L2MEM_RESERVE_SIZE 0x00006000 /* reserved block for mem test(Bytes) */
#define L2MEM_BLOCK_SIZE 0x00002000 /* block size for mem test (Bytes) */
#define L2MEM_TEST_START_ADD 0x00020000 /* where the mem test starts */
#define L2MEM_BITR_BLOCK_ADD 0x000FA000 /* bit reserve block address to copy */
#define L2MEM_IMAGE_BLOCK_ADD 0x000FC000 /* the result address */
#define L2MEM_BACKUP_BLOCK_ADD 0x000FE000 /* the code/data backup address */
/* max block number for mem test */
#define L2MEM_MAX_BLOCK_NUM (L2MEM_SRAM_SIZE-L2MEM_RESERVE_SIZE-L2MEM_TEST_START_ADD)\
/L2MEM_BLOCK_SIZE
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Macro definitions for EMIFA
\******************************************************************************/
/* Macro definitions for EMIFA SDRAM test */
#if POST_TEST_MODE /* for CPB */
#define EMIFA_SDRAM_SIZE 0x00800000 /* SDRAM (8MBytes)*/
#define EMIFA_SDRAM_TEST_START_ADD 0x90000000 /* where the SDRAM test starts */
#else /* for TMS320C6416 DSK */
#define EMIFA_SDRAM_SIZE 0x01000000 /* SDRAM (16MBytes)*/
#define EMIFA_SDRAM_TEST_START_ADD 0x80000000 /* where the SDRAM test starts */
#endif
/* max block number for SDRAM mem test */
#define EMIFA_SDRAM_MAX_BLOCK_NUM EMIFA_SDRAM_SIZE/L2MEM_BLOCK_SIZE
/* Macro definitions for EMIFA DPRAM test */
#define EMIFA_DPRAM_SIZE 0x00020000 /* DPRAM (128KBytes)*/
#define EMIFA_DPRAM_TEST_START_ADD 0x80000000 /* where the DPRAM test starts */
/* max block number for DPRAM mem test */
#define EMIFA_DPRAM_MAX_BLOCK_NUM EMIFA_DPRAM_SIZE/L2MEM_BLOCK_SIZE
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* Macro definitions for GPIO testing
\******************************************************************************/
#define CCDSP_ID 0x00000000u
#define RXDSP1_ID 0x00000001u
#define RXDSP2_ID 0x00000002u
#define RXDSP3_ID 0x00000003u
#define SCDSP_ID 0x00000004u
#define TXDSP_ID 0x00000005u
#define CCDSP_HL12 GPIO_PIN11
#define CCDSP_HL13 GPIO_PIN10
#define CCDSP_HL14 GPIO_PIN9
#define CCDSP_HL15 GPIO_PIN12
#define RXDSP1_HL20 GPIO_PIN11
#define RXDSP1_HL21 GPIO_PIN12
#define RXDSP1_HL22 GPIO_PIN10
#define RXDSP1_HL23 GPIO_PIN9
#define RXDSP2_HL28 GPIO_PIN11
#define RXDSP2_HL29 GPIO_PIN12
#define RXDSP2_HL30 GPIO_PIN10
#define RXDSP2_HL31 GPIO_PIN9
#define RXDSP3_HL24 GPIO_PIN9
#define RXDSP3_HL25 GPIO_PIN12
#define RXDSP3_HL26 GPIO_PIN10
#define RXDSP3_HL27 GPIO_PIN11
#define SCDSP_HL16 GPIO_PIN9
#define SCDSP_HL17 GPIO_PIN10
#define SCDSP_HL18 GPIO_PIN12
#define SCDSP_HL19 GPIO_PIN11
#define TXDSP_HL8 GPIO_PIN9
#define TXDSP_HL9 GPIO_PIN12
#define TXDSP_HL10 GPIO_PIN10
#define TXDSP_HL11 GPIO_PIN11
#define DSP_READY 0x00000001u
/*----------------------------------------------------------------------------*/
/******************************************************************************\
* POST Global Typedef Declarations
\******************************************************************************/
/* Structure definition of MPC8260 ACK to DSP by HPI */
typedef struct {
Uint32 length;
Uint32 dspId;
} HOST_Ack;
/* POST LOG Structure */
typedef struct {
Uint32 length;
Uint32 dspId;
Uint32 deviceType;
Uint32 cpuId;
Uint32 revId;
Uint32 siliconRevId;
Uint32 endianMode;
Uint32 errorCode;
Uint32 l2memPosition;
Uint32 sdramPosition;
Uint32 dpramPosition;
Uint32 mpc8260AckAdd;
} POST_Log;
#endif /* _BBU_DD_POST_H_ */
/******************************************************************************\
* End of BBU_DD_Post.h
\******************************************************************************/
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