;/****************************************************************************\
; *           Copyright (C) 2000 Texas Instruments Incorporated.             *
; *                           All Rights Reserved                            *
; *                                                                          *
; * GENERAL DISCLAIMER                                                       *
; * ------------------                                                       *
; * All software and related documentation is provided "AS IS" and without   *
; * warranty or support of any kind and Texas Instruments expressly disclaims*
; * all other warranties, express or implied, including, but not limited to, *
; * the implied warranties of merchantability and fitness for a particular   *
; * purpose.  Under no circumstances shall Texas Instruments be liable for   *
; * any incidental, special or consequential damages that result from the    *
; * use or inability to use the software or related documentation, even if   *
; * Texas Instruments has been advised of the liability.                     *
;\****************************************************************************/

;This routine checks the branch instruction and examples of making all instruction conditional


		.ref _Inst_Test     ;system initialization section
		.ref main_shell ;the main control shell that calls 
				;all the subroutines
		.def cond


		.sect   "condchk"

;ARGUMENTS PASSED TO THIS ROUTINE
;A4 = 0FFFFh
;B4 = 5454h 
;A6 = 5151h
;B6 = 3333h
;A8 = AAAAh
;B8 = 2222h
;A10 = FFFFFFFFh
;B10 = 00000003h 
		
cond:

;saving (or pushing) appropriate registers onto the stack

		STW     .D2     A10, *B15--[1]  ;decrementing SP
		STW     .D2     B10, *B15--[1]  ;coping variables

;*******************************************
;* This checks for simple BRANCH statement *
;* and then conditional branch.            *
;*******************************************
		B       .S2     testbr1         ;BRANCH TO LABEL
		MVKL    .S1     testbr1, A2     ;A2 is pointer to
		MVKH    .S1     testbr1, A2     ;label "testbr1"
		NOP     3                       
	[!A2]   B       .S2     ERRCOND1        ;ERROR, if A2 = 0
		NOP     5                               
testbr1:        
		ZERO    .L1     A2              ;A2 = 0 but never
						;returns to error
						;statement

		MV      .S2x    A4, B2          ;moving A4 to B2
	[B2]    B       .S2     testbr2         ;Branch, if B2 != 0
		NOP     5                       ;otherwise don't
		ZERO    .L2     B2              ;B2 = 0
	[!B2]   B       .S2     ERRCOND1        ;ERROR, if B2 = 0
		NOP     5

;The following label has no code so it will continue to 
;run the code sequentially. 

testbr2:                                        
					
;**********************************************
;* This part checks conditional instructions. *
;* REMINDER: All instructions can be made     *
;* conditional. This code segment will give   *
;* examples of how they can be used.          *
;**********************************************
;Conditional registers are:
;A1, A2, B0, B1, B2
		
		MV      .S2x    A4, B0          ;B0 = 0000FFFFh
		CMPEQ   .L2x    B0, A4, B1      ;B1 = 1, if B0 = A4
	[B1]    ZERO    .S2     B0              ;B0 = 0, if B1 != 0 
	[B0]    B       .S2     ERRCOND2        ;ERROR, if B0 != 0              
		NOP     5
	[!B0]   ADD     .L2     B0, 1, B0       ;CONDITIONAL ADD
	[B0]    MV      .S1     A4, A2          ;CONDITIONAL MV
		CMPEQ   .L1     A4, A2, A2      ;A2 = 1, A4 = A2
	[A2]    SUB     .L1     A2, 1, A2       ;A2 = 0
	[A2]    B       .S2     ERRCOND2        ;ERROR, if A2 != 0
		NOP     5
	[B0]    ZERO    .S2     B0              ;CONDITIONAL CLEAR
		
;loading (or popping) appropriate registers from the stack
ENDCOND:
		LDW     .D2     *++B15[1], B10  ;before returning to
		LDW     .D2     *++B15[1], A10  ;the calling routine
		NOP     4

		B       .S2     B3      ;RETURN TO THE 
		NOP     5               ;MAIN CONTROL SHELL

;*
;*Error Handlers
;*
		
ERRCOND1:       MVKL    .S2     61h, B0         ;B fail code
		B       .S2     ENDCOND         ;including conditional
		NOP     5                       ;branch

ERRCOND2:       MVKL    .S2     62h, B0         ;CONDITIONAL instr.
		B       .S2     ENDCOND         ;fail code
		NOP     5