;/****************************************************************************\
; *           Copyright (C) 2000 Texas Instruments Incorporated.             *
; *                           All Rights Reserved                            *
; *                                                                          *
; * GENERAL DISCLAIMER                                                       *
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; * All software and related documentation is provided "AS IS" and without   *
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; * Texas Instruments has been advised of the liability.                     *
;\****************************************************************************/

;This routine checks 40-bit ALU operations

		.ref _Inst_Test     ;system initialization section
		.ref main_shell ;the main control shell that calls 
				;all the subroutines
		.def alu40


		.sect   "alu2chk"

;ARGUMENTS PASSED TO THIS ROUTINE
;A4 = 0FFFFh
;B4 = 5454h 
;A6 = 5151h
;B6 = 3333h
;A8 = AAAAh
;B8 = 2222h
;A10 = FFFFFFFFh
;B10 = 00000003h 
		
alu40:

;********************************************************
;* This routine shows how you can do 40 bit arithmetic  *
;* operation and also one example of 40 bit logical     *
;* operation. The instructions used in this example are *
;* ADDU, SUBU, CMPEQ.                                   *
;********************************************************

;saving (or pushing) appropriate registers onto the stack

		STW     .D2     A10, *B15--[1]  ;decrementing SP
		STW     .D2     B10, *B15--[1]  ;coping variables

;preliminary setup
		MVKL     .S2     01h, B1         ;EXPECTED RESULTS
		MVKL    .S1     5453h, A5       ;FOR COMPARISON

;32 bits go into A2, while bits go into A3
		ADDU    .L1x    A10, B4, A3:A2  ;40-bit addition
		CMPEQ   .L1     A5, A2, A1      ;A1 = 1, if A5 = A2
		SUB     .L1     A1, 1, A1       ;A1 = 0
	[A1]    B       .S1     ERR40ALU1       ;ERROR, if A1 != 0
		CMPEQ   .L2x    B1, A3, B2      ;B2 = 1, if A3 = B1
		SUB     .L2     B2, 1, B2       ;B2 = 0
		NOP     3                       ;comparing 8 bits of 
	[B2]    B       .S1     ERR40ALU1       ;second register
		NOP     5                       ;ERROR, if B2 != 0

		CMPEQ   .L1     A5, A3:A2, A2   ;40 bit compare
	[A2]    B       .S1     ERR40ALU2       ;ERROR, if A2 != 0
		NOP     5

;checking for 40bit SUB

		SUBU    .L2x    B6, A10, B5:B4  ;40bit subtraction
		MVKL    .S2     3334h, B1       ;EXPECTED RESULT
		MVKL    .S2     0FFh, B2        ;FOR COMPARISON
		CMPEQ   .L2     B2, B5, B0      ;B0 = 1, if B2 = B5
		SUB     .L2     B0, 1, B0       ;B0 = B0 - 1 = 0
	[B0]    B       .S2     ERR40ALU3       ;ERROR, if B0 != 0
		CMPEQ   .L2     B1, B4, B1      ;B1 = 1, if B1 = B4
		SUB     .L2     B1, 1, B1       ;B1 = B1 - 1 = 0
		NOP     3
	[B1]    B       .S2     ERR40ALU3       ;ERROR, if B0
		NOP     5

;loading (or popping) appropriate registers from the stack
ENDALU40:
		LDW     .D2     *++B15[1], B10  ;before returning to
		LDW     .D2     *++B15[1], A10  ;the calling routine
		NOP     4

		B       .S2     B3      ;RETURN TO THE 
		NOP     5               ;MAIN CONTROL SHELL

;*
;*Error Handlers
;*
		
ERR40ALU1:      MVKL     .S2     81h, B0         ;ADDU fail code
		B       .S2     ENDALU40
		NOP     5

ERR40ALU2:      MVKL     .S2     82h, B0         ;CMPEQ fail code
		B       .S2     ENDALU40
		NOP     5

ERR40ALU3:      MVKL    .S2     83h, B0         ;SUBU fail code
		B       .S2     ENDALU40
		NOP     5