?? cafe_nand.c
字號:
/* * Driver for One Laptop Per Child ‘CAFé’ controller, aka Marvell 88ALP01 * * The data sheet for this device can be found at: * http://www.marvell.com/products/pcconn/88ALP01.jsp * * Copyright ? 2006 Red Hat, Inc. * Copyright ? 2006 David Woodhouse <dwmw2@infradead.org> */#define DEBUG#include <linux/device.h>#undef DEBUG#include <linux/mtd/mtd.h>#include <linux/mtd/nand.h>#include <linux/mtd/partitions.h>#include <linux/rslib.h>#include <linux/pci.h>#include <linux/delay.h>#include <linux/interrupt.h>#include <linux/dma-mapping.h>#include <asm/io.h>#define CAFE_NAND_CTRL1 0x00#define CAFE_NAND_CTRL2 0x04#define CAFE_NAND_CTRL3 0x08#define CAFE_NAND_STATUS 0x0c#define CAFE_NAND_IRQ 0x10#define CAFE_NAND_IRQ_MASK 0x14#define CAFE_NAND_DATA_LEN 0x18#define CAFE_NAND_ADDR1 0x1c#define CAFE_NAND_ADDR2 0x20#define CAFE_NAND_TIMING1 0x24#define CAFE_NAND_TIMING2 0x28#define CAFE_NAND_TIMING3 0x2c#define CAFE_NAND_NONMEM 0x30#define CAFE_NAND_ECC_RESULT 0x3C#define CAFE_NAND_DMA_CTRL 0x40#define CAFE_NAND_DMA_ADDR0 0x44#define CAFE_NAND_DMA_ADDR1 0x48#define CAFE_NAND_ECC_SYN01 0x50#define CAFE_NAND_ECC_SYN23 0x54#define CAFE_NAND_ECC_SYN45 0x58#define CAFE_NAND_ECC_SYN67 0x5c#define CAFE_NAND_READ_DATA 0x1000#define CAFE_NAND_WRITE_DATA 0x2000#define CAFE_GLOBAL_CTRL 0x3004#define CAFE_GLOBAL_IRQ 0x3008#define CAFE_GLOBAL_IRQ_MASK 0x300c#define CAFE_NAND_RESET 0x3034/* Missing from the datasheet: bit 19 of CTRL1 sets CE0 vs. CE1 */#define CTRL1_CHIPSELECT (1<<19)struct cafe_priv { struct nand_chip nand; struct mtd_partition *parts; struct pci_dev *pdev; void __iomem *mmio; struct rs_control *rs; uint32_t ctl1; uint32_t ctl2; int datalen; int nr_data; int data_pos; int page_addr; dma_addr_t dmaaddr; unsigned char *dmabuf;};static int usedma = 1;module_param(usedma, int, 0644);static int skipbbt = 0;module_param(skipbbt, int, 0644);static int debug = 0;module_param(debug, int, 0644);static int regdebug = 0;module_param(regdebug, int, 0644);static int checkecc = 1;module_param(checkecc, int, 0644);static unsigned int numtimings;static int timing[3];module_param_array(timing, int, &numtimings, 0644);#ifdef CONFIG_MTD_PARTITIONSstatic const char *part_probes[] = { "RedBoot", NULL };#endif/* Hrm. Why isn't this already conditional on something in the struct device? */#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)/* Make it easier to switch to PIO if we need to */#define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)#define cafe_writel(cafe, datum, addr) writel(datum, (cafe)->mmio + CAFE_##addr)static int cafe_device_ready(struct mtd_info *mtd){ struct cafe_priv *cafe = mtd->priv; int result = !!(cafe_readl(cafe, NAND_STATUS) | 0x40000000); uint32_t irqs = cafe_readl(cafe, NAND_IRQ); cafe_writel(cafe, irqs, NAND_IRQ); cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n", result?"":" not", irqs, cafe_readl(cafe, NAND_IRQ), cafe_readl(cafe, GLOBAL_IRQ), cafe_readl(cafe, GLOBAL_IRQ_MASK)); return result;}static void cafe_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len){ struct cafe_priv *cafe = mtd->priv; if (usedma) memcpy(cafe->dmabuf + cafe->datalen, buf, len); else memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len); cafe->datalen += len; cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n", len, cafe->datalen);}static void cafe_read_buf(struct mtd_info *mtd, uint8_t *buf, int len){ struct cafe_priv *cafe = mtd->priv; if (usedma) memcpy(buf, cafe->dmabuf + cafe->datalen, len); else memcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len); cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n", len, cafe->datalen); cafe->datalen += len;}static uint8_t cafe_read_byte(struct mtd_info *mtd){ struct cafe_priv *cafe = mtd->priv; uint8_t d; cafe_read_buf(mtd, &d, 1); cafe_dev_dbg(&cafe->pdev->dev, "Read %02x\n", d); return d;}static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command, int column, int page_addr){ struct cafe_priv *cafe = mtd->priv; int adrbytes = 0; uint32_t ctl1; uint32_t doneint = 0x80000000; cafe_dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n", command, column, page_addr); if (command == NAND_CMD_ERASE2 || command == NAND_CMD_PAGEPROG) { /* Second half of a command we already calculated */ cafe_writel(cafe, cafe->ctl2 | 0x100 | command, NAND_CTRL2); ctl1 = cafe->ctl1; cafe->ctl2 &= ~(1<<30); cafe_dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n", cafe->ctl1, cafe->nr_data); goto do_command; } /* Reset ECC engine */ cafe_writel(cafe, 0, NAND_CTRL2); /* Emulate NAND_CMD_READOOB on large-page chips */ if (mtd->writesize > 512 && command == NAND_CMD_READOOB) { column += mtd->writesize; command = NAND_CMD_READ0; } /* FIXME: Do we need to send read command before sending data for small-page chips, to position the buffer correctly? */ if (column != -1) { cafe_writel(cafe, column, NAND_ADDR1); adrbytes = 2; if (page_addr != -1) goto write_adr2; } else if (page_addr != -1) { cafe_writel(cafe, page_addr & 0xffff, NAND_ADDR1); page_addr >>= 16; write_adr2: cafe_writel(cafe, page_addr, NAND_ADDR2); adrbytes += 2; if (mtd->size > mtd->writesize << 16) adrbytes++; } cafe->data_pos = cafe->datalen = 0; /* Set command valid bit, mask in the chip select bit */ ctl1 = 0x80000000 | command | (cafe->ctl1 & CTRL1_CHIPSELECT); /* Set RD or WR bits as appropriate */ if (command == NAND_CMD_READID || command == NAND_CMD_STATUS) { ctl1 |= (1<<26); /* rd */ /* Always 5 bytes, for now */ cafe->datalen = 4; /* And one address cycle -- even for STATUS, since the controller doesn't work without */ adrbytes = 1; } else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_RNDOUT) { ctl1 |= 1<<26; /* rd */ /* For now, assume just read to end of page */ cafe->datalen = mtd->writesize + mtd->oobsize - column; } else if (command == NAND_CMD_SEQIN) ctl1 |= 1<<25; /* wr */ /* Set number of address bytes */ if (adrbytes) ctl1 |= ((adrbytes-1)|8) << 27; if (command == NAND_CMD_SEQIN || command == NAND_CMD_ERASE1) { /* Ignore the first command of a pair; the hardware deals with them both at once, later */ cafe->ctl1 = ctl1; cafe_dev_dbg(&cafe->pdev->dev, "Setup for delayed command, ctl1 %08x, dlen %x\n", cafe->ctl1, cafe->datalen); return; } /* RNDOUT and READ0 commands need a following byte */ if (command == NAND_CMD_RNDOUT) cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_RNDOUTSTART, NAND_CTRL2); else if (command == NAND_CMD_READ0 && mtd->writesize > 512) cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_READSTART, NAND_CTRL2); do_command: cafe_dev_dbg(&cafe->pdev->dev, "dlen %x, ctl1 %x, ctl2 %x\n", cafe->datalen, ctl1, cafe_readl(cafe, NAND_CTRL2)); /* NB: The datasheet lies -- we really should be subtracting 1 here */ cafe_writel(cafe, cafe->datalen, NAND_DATA_LEN); cafe_writel(cafe, 0x90000000, NAND_IRQ); if (usedma && (ctl1 & (3<<25))) { uint32_t dmactl = 0xc0000000 + cafe->datalen; /* If WR or RD bits set, set up DMA */ if (ctl1 & (1<<26)) { /* It's a read */ dmactl |= (1<<29); /* ... so it's done when the DMA is done, not just the command. */ doneint = 0x10000000; } cafe_writel(cafe, dmactl, NAND_DMA_CTRL); } cafe->datalen = 0; if (unlikely(regdebug)) { int i; printk("About to write command %08x to register 0\n", ctl1); for (i=4; i< 0x5c; i+=4) printk("Register %x: %08x\n", i, readl(cafe->mmio + i)); } cafe_writel(cafe, ctl1, NAND_CTRL1); /* Apply this short delay always to ensure that we do wait tWB in * any case on any machine. */ ndelay(100); if (1) { int c; uint32_t irqs; for (c = 500000; c != 0; c--) { irqs = cafe_readl(cafe, NAND_IRQ); if (irqs & doneint) break; udelay(1); if (!(c % 100000)) cafe_dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs); cpu_relax(); } cafe_writel(cafe, doneint, NAND_IRQ); cafe_dev_dbg(&cafe->pdev->dev, "Command %x completed after %d usec, irqs %x (%x)\n", command, 500000-c, irqs, cafe_readl(cafe, NAND_IRQ)); } WARN_ON(cafe->ctl2 & (1<<30)); switch (command) { case NAND_CMD_CACHEDPROG: case NAND_CMD_PAGEPROG: case NAND_CMD_ERASE1: case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_RNDIN: case NAND_CMD_STATUS: case NAND_CMD_DEPLETE1: case NAND_CMD_RNDOUT: case NAND_CMD_STATUS_ERROR: case NAND_CMD_STATUS_ERROR0: case NAND_CMD_STATUS_ERROR1: case NAND_CMD_STATUS_ERROR2: case NAND_CMD_STATUS_ERROR3: cafe_writel(cafe, cafe->ctl2, NAND_CTRL2); return; } nand_wait_ready(mtd); cafe_writel(cafe, cafe->ctl2, NAND_CTRL2);}static void cafe_select_chip(struct mtd_info *mtd, int chipnr){ struct cafe_priv *cafe = mtd->priv; cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr); /* Mask the appropriate bit into the stored value of ctl1 which will be used by cafe_nand_cmdfunc() */ if (chipnr) cafe->ctl1 |= CTRL1_CHIPSELECT; else cafe->ctl1 &= ~CTRL1_CHIPSELECT;}static int cafe_nand_interrupt(int irq, void *id){ struct mtd_info *mtd = id; struct cafe_priv *cafe = mtd->priv; uint32_t irqs = cafe_readl(cafe, NAND_IRQ); cafe_writel(cafe, irqs & ~0x90000000, NAND_IRQ); if (!irqs) return IRQ_NONE; cafe_dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, cafe_readl(cafe, NAND_IRQ)); return IRQ_HANDLED;}static void cafe_nand_bug(struct mtd_info *mtd){ BUG();}static int cafe_nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page){ int status = 0; chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); status = chip->waitfunc(mtd, chip); return status & NAND_STATUS_FAIL ? -EIO : 0;}/* Don't use -- use nand_read_oob_std for now */static int cafe_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, int page, int sndcmd){ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); return 1;}/** * cafe_nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read * @mtd: mtd info structure * @chip: nand chip info structure * @buf: buffer to store read data * * The hw generator calculates the error syndrome automatically. Therefor * we need a special oob layout and handling. */static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf){ struct cafe_priv *cafe = mtd->priv; cafe_dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n", cafe_readl(cafe, NAND_ECC_RESULT), cafe_readl(cafe, NAND_ECC_SYN01)); chip->read_buf(mtd, buf, mtd->writesize); chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); if (checkecc && cafe_readl(cafe, NAND_ECC_RESULT) & (1<<18)) { unsigned short syn[8], pat[4]; int pos[4]; u8 *oob = chip->oob_poi; int i, n; for (i=0; i<8; i+=2) { uint32_t tmp = cafe_readl(cafe, NAND_ECC_SYN01 + (i*2)); syn[i] = cafe->rs->index_of[tmp & 0xfff]; syn[i+1] = cafe->rs->index_of[(tmp >> 16) & 0xfff]; } n = decode_rs16(cafe->rs, NULL, NULL, 1367, syn, 0, pos, 0, pat); for (i = 0; i < n; i++) { int p = pos[i]; /* The 12-bit symbols are mapped to bytes here */ if (p > 1374) { /* out of range */ n = -1374; } else if (p == 0) { /* high four bits do not correspond to data */ if (pat[i] > 0xff) n = -2048; else buf[0] ^= pat[i]; } else if (p == 1365) { buf[2047] ^= pat[i] >> 4; oob[0] ^= pat[i] << 4; } else if (p > 1365) { if ((p & 1) == 1) { oob[3*p/2 - 2048] ^= pat[i] >> 4; oob[3*p/2 - 2047] ^= pat[i] << 4; } else { oob[3*p/2 - 2049] ^= pat[i] >> 8; oob[3*p/2 - 2048] ^= pat[i]; } } else if ((p & 1) == 1) { buf[3*p/2] ^= pat[i] >> 4; buf[3*p/2 + 1] ^= pat[i] << 4; } else { buf[3*p/2 - 1] ^= pat[i] >> 8; buf[3*p/2] ^= pat[i]; } } if (n < 0) { dev_dbg(&cafe->pdev->dev, "Failed to correct ECC at %08x\n", cafe_readl(cafe, NAND_ADDR2) * 2048); for (i = 0; i < 0x5c; i += 4) printk("Register %x: %08x\n", i, readl(cafe->mmio + i)); mtd->ecc_stats.failed++; } else { dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", n); mtd->ecc_stats.corrected += n; } } return 0;}static struct nand_ecclayout cafe_oobinfo_2048 = {
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -