?? bsp.c
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/*********************************************************************************************************** uC/OS-II* The Real-Time Kernel** (c) Copyright 2006, Micrium, Inc., Weston, FL* All Rights Reserved** Freescale MCFQE128* on the DEMOQE128 EVB* Board Support Package** File : bsp.c* Programmer : Eric Shufro**********************************************************************************************************/#include "includes.h"/*********************************************************************************************************** CONSTANTS**********************************************************************************************************/#define PTC_LED_MASK 0x3F /* DEMOQE EVB LED bit definitions. */#define PTE_LED_MASK 0xC0 /* Note: PTC4 is attached to the onboard accelerometer */ /* Note: PTC5 is attached to the SCI transceiver enable *//*********************************************************************************************************** PROTOTYPES**********************************************************************************************************/static void FLL_Init(void);static void OSTickISR_Init(void); static void LED_Init(void); /*********************************************************************************************************** GLOBALS**********************************************************************************************************/static CPU_INT16U OSTickCnts; /* Store number of increments of timer for OS tick rate *//*********************************************************************************************************** BSP_Init()** Description: Initialize FLL, OS Ticker, and other basic hardware services.** Arguments : None.** Returns : None.** Note(s) : None.**********************************************************************************************************/void BSP_Init (void){ SOPT1 = 0x23; /* Disable COP,RSTO, enable STOP,BKGD,RESET */ SPMSC1 = 0x00; /* Disable LVD */ SPMSC2 = 0x00; /* Disable power-down modes */ SPMSC3 = 0x00; /* Disable LVWIE, low trip points */ SCGC1 = 0xFF; /* Enable bus clock to peripherals */ SCGC2 = 0xFF; /* Enable bus clock to peripherals */ FLL_Init(); /* Initialize the FLL. */ OSTickISR_Init(); /* Initialize the TPM for use as the OS time tick source */ LED_Init(); /* Initialize onboard LEDs */}/*********************************************************************************************************** FLL_Init()** Description : This function is used to initialize the FLL. The CPU clock frequency is configured* to 39.85MHz and the BUS Frequency is consequently set to 19.925MHz. * * Arguments : None.* * Returns : None.** Notes : 1) The CPU clock (ICSOUT) is derived from an internal oscillator. The internal oscillator* frequency may be either 31250Hz when manually trimmed, or 32768Hz when DMX32 within * ICSSC is set. Other trimmed values are possible and should be configured within* bsp.h by setting the macro BSP_INT_REF_FREQ accordingly.* 2) ICSOUT MUST NOT exceed 59.77MHz (See Note 3)* 3) The peripheral bus frequency (Fbus) equals (ICSOUT / BDIV / 2). Fbus MUST NOT exceed* 10MHz when VDD is less than 2.1 volts. If VDD is greater than 2.1 volts, then Fbus* must not exceed 25.165MHz.* 4) See page 241, Table 12-7 'DCO frequency range' in MCF51QE128_Reference_Manual.pdf*/static void FLL_Init (void){ ICSC1 |= ICSC1_IREFS_MASK; /* Ensure that the internal reference clock is selected */ ICSC2 = (0 << ICSC2_BDIV_BITNUM); /* Bus divider = 1, FEI mode (FLL Engaged Internal) */ while ((ICSSC & ICSSC_IREFST_MASK) == 0) { /* Wait for switch to internal clock source */ ; } ICSSC |= ICSSC_DRST_DRS1_MASK; /* Set the DCO range bits to '10', high-range */ while ((ICSSC & 0xC4) != ICSSC_DRST_DRS1_MASK) { /* Wait until FLL switches to high-range DCO mode */ ; }}/*********************************************************************************************************** BSP_CPU_ClkFreq()** Description : The function may be used to determine the value of ICSOUT** Arguments : None.* * Returns : The CPU operating frequency in Hz, or 0 if unknown. ** Note(s) : 1) The CPU BUS frequency may be computed during runtime by dividing the * return value of this function by 2.* 2) This function does not account for oscillator trimming and assumes the oscillator* frequency is defined in bsp.h.**********************************************************************************************************/CPU_INT32U BSP_CPU_ClkFreq (void){ CPU_INT32U ext_ref_freq; CPU_INT32U ics_out; CPU_INT16U rdiv; CPU_INT16U bdiv; CPU_INT16U fll_factor; CPU_INT08U drs; CPU_INT08U reg_val; ics_out = 0; /* Initialize the return value to 0 */ rdiv = (ICSC1 & ICSC1_RDIV_MASK) >> ICSC1_RDIV_BITNUM; if ((ICSC2 & ICSC2_RANGE_MASK) == 0) { /* If the RANGE setting is set to 0 */ rdiv = (1 << rdiv); /* Compute external oscillator divider for RANGE == 0 */ } else { rdiv += 5; /* Add an offset for divider calculation given RANGE == 1 */ rdiv = (1 << rdiv); /* Compute external oscillator divider */ } if (rdiv > 1024) { /* Check for reserved RDIV values 6 and 7 when RANGE == 1 */ ext_ref_freq = 0; /* Set value of 0 if the settings are wrong */ } else { ext_ref_freq = (BSP_EXT_REF_FREQ / rdiv); /* Compute the ext ref frequency given RDIV and RANGE */ } /* Compute actual bus divider given register bits */ bdiv = (ICSC2 & ICSC2_BDIV_MASK) >> ICSC2_BDIV_BITNUM; bdiv = (1 << bdiv); /* Determine which clock the MCU is running on */ reg_val = (ICSSC & ICSSC_CLKST_MASK) >> ICSSC_CLKST_BITNUM; switch (reg_val) { /* Compute ICS_OUT based on the current processor clock */ case 0: /* Output of FLL is selected */ case 3: /* Obtain the range status for the FLL */ drs = (ICSSC & ICSSC_DRST_DRS_MASK) >> ICSSC_DRST_DRS_BITNUM; if (drs == 3) { /* If the DRS reserved value is selected */ ics_out = 0; /* then the clock frequency is unknown */ break; } drs++; /* Increment the value of DRS so it is not 0 based */ if ((ICSSC & ICSSC_DMX32_MASK) == 0) { fll_factor = drs * 512; /* Determine the FLL mult factor given DRS and DMX32 */ } else { fll_factor = drs * 608; /* Determine the FLL mult factor given DRS and DMX32 */ } if ((ICSSC & ICSSC_IREFST_MASK) > 0) { /* If the FLL is connected to the internal reference clock */ ics_out = BSP_INT_REF_FREQ * fll_factor; } else { /* FLL is connected to the external reference clock */ ics_out = ext_ref_freq * fll_factor; } break; case 1: /* Internal reference clock is selected */ ics_out = BSP_INT_REF_FREQ; break; case 2: /* External reference clock is selected */ ics_out = ext_ref_freq; break; } ics_out /= bdiv; /* Consider the bus divider, compute final ICSOUT */ return (ics_out); /* Return the CPU operating frequency */}/*********************************************************************************************************** DISABLE ALL INTERRUPTS** Description : This function disables all interrupts from the interrupt controller.** Arguments : none**********************************************************************************************************/void BSP_IntDisAll (void){#if OS_CRITICAL_METHOD == 3 CPU_SR cpu_sr;#endif OS_ENTER_CRITICAL(); /* Disable all interrupts */}/*********************************************************************************************************** LED_Init()** Description : Initialize the data direction registers for Port C and Port E both of which have* LEDs attached to their I/O pins on the DEMOQE EVB.** Arguments : None.** Returns : None.** Notes : None.**********************************************************************************************************/void LED_Init (void){ LED_Off(0); /* Ensure LEDs I/O are initialized with LEDs off */ PTCDD |= PTC_LED_MASK; /* Configure Port C LED bits as outputs */ PTEDD |= PTE_LED_MASK; /* Configure Port E LED bits as outputs */}/**********************************************************************************************************?? 快捷鍵說明
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