/*******************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2004
*
*******************************************************************************/

/*******************************************************************************
 *
 * Filename:
 * ---------
 *	  flash_drv_INTEL.h 
 *
 * Project:
 * --------
 *    FlashTool Download Agent 
 *
 * Description:
 * ------------
 *    This Module defines the INTEL family flash driver. 
 *
 * Author:
 * -------
 *	  Amos Hsu
 *
 *==============================================================================
 * 				HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! 
 *------------------------------------------------------------------------------
 * $Revision:   1.6  $ 
 * $Modtime:   Jan 10 2006 22:03:24  $
 * $Log:   //mtkvs01/vmdata/flash_tool/archives/DA/INC/flash_drv_INTEL.h-arc  $
 *
 * Mar 8 2006 mtk00539
 * [STP100000625] FlashTool v2.7.1016
 *  1. [DA] Supports new NOR flash device.
 * 		[INTEL] PF48F50xxM0x1xx
 * 		[INTEL] PF48F40xxM0x0xx
 * 		[INTEL] PF48F40xxM0x1xx
 *  2. [DA] Supports new NAND flash device.
 * 		[MICRON] MT29F2G08AAC
 * 		[MICRON] MT29F4G08BAB
 * 		[RENESAS] superAND 512Mb/8bits
 * 		[RENESAS] superAND 512Mb/16bits
 * 		[Infineon] HYF33DS51280
 * 		[Infineon] HYF33DS1G80
 * 		[Infineon] HYF33DS1G16
 * 
 * 
 *    Rev 1.6   Jan 14 2006 00:22:00   mtk00539
 * New features:
 *  1. [DA] Supports INTEL Sibley family flash.
 * Resolution for 159: [FlashTool v2.7.1015]
 * 
 *    Rev 1.5   Nov 19 2005 00:43:22   mtk00539
 *  1. [BROM_DLL&DA][New] Add UID Secure Booting feature.
 *  2. [BROM_DLL&DA][BUG FIX] Fix RTC date-time value could not be initialized problem. 
 *  3. [DA][New] Supports new NOR flash device.
 * 				[INTEL] 38F1010C0ZBL0
 * 				[INTEL] 28F1602C3BD70
 * 				[TOSHIBA] TY0068B012APGG
 * 				[TOSHIBA] TY0068B013APGG
 *  4. [DA][New] Supports new NAND flash device.
 * 				[HYNIX] HY27XG082G2M
 * Resolution for 149: [BROM_DLL v2.7.1011][New] Add UID Secure Booting feature and Bug Fix.
 * 
 *    Rev 1.4   May 24 2005 19:56:10   mtk00539
 *  1. [DA][New] Support new flash devices S71PL254JXX, S71WS256NXX.
 *  2. [DA][New] Add DA_ENABLE_WATCHDOG_CMD command to enable watchdog. 
 * Resolution for 115: [BROM_DLL v2.4.1012][New] Support new flash devices and bug fix.
 * 
 *    Rev 1.3   Nov 29 2004 15:49:36   mtk00539
 * [DA][New] Support new flashes [SHARP]LRS18B0 and LRS1863.
 * Resolution for 99: [BROM_DLL v2.4.1008][New] Support INTEL family flash Buffered-Program method.
 * 
 *    Rev 1.2   Nov 22 2004 12:23:50   mtk00539
 *  1. [DA][BUG FIX] Add data verification in status polling during erase or program operation.
 *  2. [DA][BUG FIX] Fix two dies flash detection fail in INTEL_CheckDevID(). 
 *  3. [DA][Change Behavior] When RX_BUFFER_FULL occurs, flush data queued in UART ring buffer til data is less than 512KB.
 *  4. [DA][New] Support Buffered-Program method for INTEL family flashes.
 *  5. [DA][New] Support new flashes [SHARP]LRS1828C and [RENESAS]M6MGB64BM34CDG.
 * Resolution for 99: [BROM_DLL v2.4.1008][New] Support INTEL family flash Buffered-Program method.
 * 
 *    Rev 1.1   Aug 03 2004 10:42:44   mtk00539
 *  1. [DA][BUG FIX] Invoke Board_Schematic()(old name is HW_Init()) before FUTL_CheckDevice(). Because FUTL_CheckDevice() must know the absolute address for each bank.
 *  2. [DA][New] Add 12 new flash devices support 
 * 				[SAMSUNG]K5A3280YT,
 * 				[TOSHIBA]TH50VPF6782AASB,
 * 				[TOSHIBA]TH50VPF6783AASB,
 * 				[TOSHIBA]TV00578002AABD,
 * 				[TOSHIBA]TV00578003AABD,
 * 				[Fujitsu]MB84VP24581HK,
 * 				[INTEL]INTEL_28F640W30_B,
 * 				[SPANSION]AM49PDL127BH,
 * 				[SPANSION]AM49PDL129BH,
 * 				[RENESAS]M6MGD13BW66CDG,
 * 				[Winbond]W19B322TM,
 * 				[Winbond]W19B323TM,
 *  3. [DA][New] Readback check after WORD program is done, so that DA won't have to keep the chksum.
 *  4. [DA][New] Auto-detect baseband chip type.
 *  5. [DA][New] Auto-detect external SRAM size.
 *  6. [DA][New] Merge MT6205B, MT6218B and MT6219 to an all-in-one DA.
 *  7. [DA][New] Merge flash stress test module.
 *  8. [DA][New] Modify makefile to build ARM or THUMB code.
 *  9. [DA][New] Construct a customization kit for customers to add new flash or SOC checking algorithm by themselves.
 * 10. [DA][Enhance] Split out AM29PDL128G function to improve the performance of general AMD callback functions.
 * 11. [DA][Enhance] Enhance RX_BUFF_FULL behavior to prevent always retry two times.
 * Resolution for 83: [BROM_DLL v2.4.1002] Merge all the DAs into all-in-one DA and fix many bugs and enhancement.
 * 
 *    Rev 1.0   Jul 19 2004 01:46:00   mtk00539
 * Initial revision.
 * 
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! 
 *==============================================================================
 *******************************************************************************/
#ifndef _FLASH_DRV_INTEL_H_
#define _FLASH_DRV_INTEL_H_

#include "flash.h"

// READ CMD 
#define INTEL_CMD_READ_ARRAY			0xFF
#define INTEL_CMD_READ_ID				0x90
#define INTEL_CMD_READ_SR				0x70
#define INTEL_CMD_CLR_SR				0x50

// PROGRAM CMD 
#define INTEL_CMD_WORD_PGM				0x40
#define INTEL_CMD_BUF_PGM				0xE8
#define INTEL_CMD_SIBLEY_BUF_PGM		0xE9
#define INTEL_CMD_BUF_PGM_CNF			0xD0
#define INTEL_CMD_BUF_EFPGM				0x80
#define INTEL_CMD_BUF_EFPGM_CNF			0xD0

// ERASE 
#define INTEL_CMD_ERASE_STEP1			0x20
#define INTEL_CMD_ERASE_STEP2			0xD0

// LOCK/UNLOCK 
#define INTEL_CMD_SW_UNLOCK_STEP1		0x60
#define INTEL_CMD_SW_UNLOCK_STEP2		0xD0

// Status Register Bit 
#define INTEL_SR7_DWS_BIT				0x0080
#define INTEL_SR6_ESS_BIT				0x0040
#define INTEL_SR5_ES_BIT				0x0020
#define INTEL_SR4_PS_BIT				0x0010
#define INTEL_SR3_VPPS_BIT				0x0008
#define INTEL_SR2_PSS_BIT				0x0004
#define INTEL_SR1_BLS_BIT				0x0002
#define INTEL_SR0_PWS_BIT				0x0001

// Extended Status (For Sibley) 
#define INTEL_RPS_MASK								0x0300
#define INTEL_RPS_REWRITE_OBJ_MODE_REGION			0x0100
#define INTEL_RPS_WRITE_B_HALF_IN_CTRL_MODE_REGION	0x0200
#define INTEL_RPS_ILLEGAL_CMD						0x0300

#ifdef __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
// Callback Function Set                                                        
//------------------------------------------------------------------------------
extern const NOR_CMD_Callback_S		INTEL_CMD_CB_WORD_PGM;
extern const NOR_CMD_Callback_S		INTEL_CMD_CB_32WORD_BUF_PGM;
extern const NOR_CMD_Callback_S		INTEL_CMD_CB_SIBLEY_BUF_PGM;
	
//------------------------------------------------------------------------------
// Memory Sector Layout Set                                                     
//------------------------------------------------------------------------------

// L18/L30 series (pure 64KW sectors) 
extern const NOR_Die_Layout_S		INTEL_L_64;
extern const NOR_Die_Layout_S		INTEL_L_128;
extern const NOR_Die_Layout_S		INTEL_L_256;
// L18/L30 series (Top Boot) 
extern const NOR_Die_Layout_S		INTEL_L_T_64;
extern const NOR_Die_Layout_S		INTEL_L_T_128;
extern const NOR_Die_Layout_S		INTEL_L_T_256;
// L18/L30 series (Bottom Boot) 
extern const NOR_Die_Layout_S		INTEL_L_B_64;
extern const NOR_Die_Layout_S		INTEL_L_B_128;
extern const NOR_Die_Layout_S		INTEL_L_B_256;


// W18/W30 series (pure 32KW sectors) 
extern const NOR_Die_Layout_S		INTEL_W_32;
extern const NOR_Die_Layout_S		INTEL_W_64;
extern const NOR_Die_Layout_S		INTEL_W_128;
// W18/W30 series (Top Boot) 
extern const NOR_Die_Layout_S		INTEL_W_T_32;
extern const NOR_Die_Layout_S		INTEL_W_T_64;
extern const NOR_Die_Layout_S		INTEL_W_T_128;
// W18/W30 series (Bottom Boot) 
extern const NOR_Die_Layout_S		INTEL_W_B_16;
extern const NOR_Die_Layout_S		INTEL_W_B_32;
extern const NOR_Die_Layout_S		INTEL_W_B_64;
extern const NOR_Die_Layout_S		INTEL_W_B_128;
// W18/W30 series (Dual Boot) 
extern const NOR_Die_Layout_S		INTEL_W_TB_32;
extern const NOR_Die_Layout_S		INTEL_W_TB_64;
extern const NOR_Die_Layout_S		INTEL_W_TB_128;

// M18 series (pure 128KW sectors) 
extern const NOR_Die_Layout_S		INTEL_M18_128;
extern const NOR_Die_Layout_S		INTEL_M18_256;
extern const NOR_Die_Layout_S		INTEL_M18_512;

//------------------------------------------------------------------------------
// Check Device ID Callback Function                                            
//------------------------------------------------------------------------------
extern bool		INTEL_CheckDevID(const uint16 dev, volatile uint16 *die1_addr, volatile uint16 *die2_addr);
//------------------------------------------------------------------------------
// Check If Device Is Idle Callback Function                                    
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Erase Related Callback Function                                              
//------------------------------------------------------------------------------
extern void		INTEL_Erase_Block_CMD(const uint32 blockaddr);
extern STATUS_E	INTEL_Erase_CheckDone(const uint32 blockaddr);
//------------------------------------------------------------------------------
// Program Related Callback Function                                            
//------------------------------------------------------------------------------
extern void		INTEL_PreProcess_32WORD_BUFPGM(const uint16 dev);
extern void		INTEL_Block_Unlock(const uint32 blockaddr);
extern void		INTEL_Word_Program(const uint32 blockaddr, const uint32 prog_addr, const uint16 data);
extern STATUS_E	INTEL_Word_Program_CheckDone(const uint32 prog_addr);
extern void		INTEL_Buf_Program(const uint32 blockaddr, const uint32 prog_addr, const uint16 *data, const uint32 length_in_word);
//------------------------------------------------------------------------------
// Sibley Related Callback Function                                             
//------------------------------------------------------------------------------
extern void		INTEL_Sibley_PreProcess_1KB_BUFPGM(const uint16 dev);
extern STATUS_E INTEL_Sibley_Program_CheckDone(const uint32 prog_addr);
extern void		INTEL_Sibley_Buf_Program(const uint32 blockaddr, const uint32 prog_addr, const uint16 *data, const uint32 length_in_word);
//------------------------------------------------------------------------------
// Protection Related Callback Function                                         
//------------------------------------------------------------------------------

#ifdef __cplusplus
}
#endif

#endif