/*******************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*******************************************************************************/

/*******************************************************************************
 *
 * Filename:
 * ---------
 *	 nand_drv_superAND.c 
 *
 * Project:
 * --------
 *   FlashTool Download Agent 
 *
 * Description:
 * ------------
 *   Renesas superAND flash driver. 
 *
 * Author:
 * -------
 *	 Amos Hsu 
 *
 *==============================================================================
 * 				HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 * $Revision$
 * $Modtime$
 * $Log$
 *
 * Mar 8 2006 mtk00539
 * [STP100000669] [DA] Support RENESAS superAND flash read back and format operation.
 * 
 *
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *==============================================================================
 *******************************************************************************/
#include "nand_drv_COMMON.h"
#include "nand_drv_superAND.h"
#include "nand_util_func.h"
#include "NFI.h"

//------------------------------------------------------------------------------
// superAND Command Set                                                         
//------------------------------------------------------------------------------
const NAND_CommandSet_S		g_NAND_superAND_2048_CMD_SET={
	 { 1, 0x90 }	// read id 
	,{ 1, 0x70 }	// read status 
	,{ 1, 0xFF }	// reset device 
	,{ 1, 0x00 }	// read 
	,{ 0, 0 }		// read spare area 
	,{ 1, 0x30 }	// read confirm 
	,{ 0, 0 }		// program 1st half page 
	,{ 1, 0x80 }	// program 
	,{ 1, 0x10 }	// program confirm 
	,{ 1, 0x60 }	// erase 
	,{ 1, 0xD0 }	// erase confirm 
	,{ 0, 0 }		// copyback read 
	,{ 0, 0 }		// copyback read confirm 
	,{ 0, 0 }		// copyback program 
	,{ 0, 0 }		// copyback program confirm 
};


//------------------------------------------------------------------------------
// superAND Callback Function Set                                               
//------------------------------------------------------------------------------
const NAND_CMD_Callback_S	g_NAND_superAND_CB_FUNC_SET={
	NAND_COMMON_ReadID
	,NAND_superAND_Reset
	,NULL
	,NAND_COMMON_ReadStatus
	,NAND_COMMON_BlockErase
	,NAND_superAND_BadBlockSymbol_Check
	,NAND_superAND_BadBlockSymbol_Set
	,NAND_superAND_PageRead
	,NAND_superAND_PageProgram
	,NAND_superAND_SpareRead
	,NAND_superAND_SpareProgram
	,NAND_superAND_CopyBack
};

//------------------------------------------------------------------------------
// Read Device ID Callback Function                                             
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Reset Device Callback Function                                               
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_Reset(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
) {
	return S_DONE;
}

//------------------------------------------------------------------------------
// Read Status Callback Function                                                
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Block Erase Related Callback Function                                        
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Bad Block Symbol Identification Related Callback Function                    
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_BadBlockSymbol_Check(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  *p_spare32 /* MUST be 32bits alignment addr */
) {
	return S_DONE;
}

STATUS_E  NAND_superAND_BadBlockSymbol_Set(
				const NAND_DeviceInfo_S  *nand_info
				,uint32  *p_spare32 /* MUST be 32bits alignment addr */
) {
	return S_DONE;
}

//------------------------------------------------------------------------------
// Page Read Callback Function                                                  
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_PageRead(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
				,const uint32  row_addr
				,uint32 *p_data32 /* MUST be 32bits alignment addr */
				,uint32  ecc_parity_from_reg[4]
) {
	uint32		page_size;
	uint32		spare_size;
	uint32		column_addr_bits;
	uint32		addr_cycle;
	STATUS_E	ret=S_UNKNOWN_ERR;
	bool		bUsingDMA=TRUE;

	page_size = NUTL_PAGE_SIZE(nand_info);
	spare_size = NUTL_SPARE_SIZE(nand_info);
	column_addr_bits = NUTL_PAGE_ADDR_SHIFT_BITS(nand_info);
	addr_cycle = NUTL_ADDR_CYCLE(nand_info);

	// reset the NFI core state machine, data FIFO and flushing FIFO 
	*NFI_OPCON = 0x0;
	*NFI_CON = 0x0;
	*NFI_FIFOCON = 0x30;

	// sequential read 
	*NFI_CMD = 0x0F;
	// wait til CMD is completely issued 
	while( *NFI_PSTA & STATUS_CMD );

	// fill 1~4 cycle addr 
	*NFI_ADDRL = (row_addr<<column_addr_bits);
	*NFI_ADDRM = 0;
	if( 4 < addr_cycle ) {
		// if addr cycle is more than 4, you have to fill 5th cycle addr 
		*NFI_ADDRM = (row_addr>>(32-column_addr_bits));
	}
	// no. of addr cycle 
	*NFI_ADDNOB = addr_cycle;
	// wait til ADDR is completely issued 
	while( *NFI_PSTA & STATUS_ADDR );

	// wait while superAND device is busy 
	// NOTICE!! the datasheet describes status check(0x70) and read confirm(0x00) flow should be added. 
	// however, those flows don't work, thus use busy state polling instead.                            
	while( *NFI_PSTA & STATUS_BUSY );

	// set burst read by DWORD to start reading 
	*NFI_OPCON = BURST_RD | NOB_DWORD;

#ifdef DISABLE_NFI_DMA
	bUsingDMA = FALSE;
#else
	bUsingDMA = TRUE;
	// activating DMA transfer 
	*NFI_CON |= DMA_RD_EN;
#endif

	// read page data 
	if( S_DONE != (ret=NUTL_FIFO_Read(c_timeout, bUsingDMA, p_data32, page_size)) ) {
		goto end;
	}

end:
	// sequential read stop 
	*NFI_CMD = 0xF0;
	// wait til CMD is completely issued 
	while( *NFI_PSTA & STATUS_CMD );

	// disable burst read 
	*NFI_OPCON = 0x0;

	return ret;
}

//------------------------------------------------------------------------------
// Page Program Callback Function                                               
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_PageProgram(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
				,const uint32  row_addr
				,const uint32 *p_data32 /* MUST be 32bits alignment addr */
				,uint32  ecc_parity_from_reg[4]
) {
	return S_CMD_ERR;
}

//------------------------------------------------------------------------------
// Spare Read Callback Function                                                 
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_SpareRead(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
				,const uint32  row_addr
				,uint32 *p_spare32 /* MUST be 32bits alignment addr */
) {
	return S_DONE;
}

//------------------------------------------------------------------------------
// Spare Program Callback Function                                              
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_SpareProgram(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
				,const uint32  row_addr
				,const uint32 *p_spare32 /* MUST be 32bits alignment addr */
) {
	return S_CMD_ERR;
}

//------------------------------------------------------------------------------
// CopyBack Callback Function                                                   
//------------------------------------------------------------------------------
STATUS_E  NAND_superAND_CopyBack(
				const NAND_DeviceInfo_S  *nand_info
				,const uint32  c_timeout
				,const uint32  src_row_addr
				,const uint32  dest_row_addr
) {
	return S_CMD_ERR;
}