?? fet440_clks1.s43
字號(hào):
#include "msp430x44x.h"
;******************************************************************************
; MSP-FET430P440 Demo - FLL+ Output MCLK, SMCLK, ACLK Using 32k XTAL
;
; Description; Output the system MCLK and ACLK.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = DCO = 32xACLK
; //*External XTALs required and not installed on FET*//
;
; MSP430F449
; -----------------
; /|\| XIN|-
; | | | 32k
; --|RST XOUT|-
; | |
; | XT2IN|-
; | | XTAL (455k - 8Mhz) - add caps as needed
; |RST XT2OUT|-
; | |
; | P1.1|-->MCLK = 1048576
; | P1.4|-->SMCLK = 1048576
; | P1.5|-->ACLK = 32kHz
;
;
; M.Buccini
; Texas Instruments, Inc
; February 2002
;******************************************************************************
;------------------------------------------------------------------------------
ORG 01100h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize '449 stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps
SetupP1 bis.b #032h,&P1DIR ; P1.1, P1.4 P1.5 output direction
bis.b #032h,&P1SEL ; P1.1, P1.4 P1.5 option select
;
Mainloop jmp Mainloop ;
;
;-----------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x44x
;-----------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
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