//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR Atmel AVR C/EC++ Compiler V3.20A/W32            19/Aug/2004  16:10:18 /
// Copyright 1996-2004 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Source file  =  Z:\qvcs\AVR318 Dallas 1-wire Communication             /
//                    Interface\Source Code\IAR\polled\OWIUARTBitFunctions.c /
//    Command line =  --cpu=m32 -ms -o "Z:\qvcs\AVR318 Dallas 1-wire         /
//                    Communication Interface\Source                         /
//                    Code\IAR\polled\Debug\Obj\" -lC "Z:\qvcs\AVR318        /
//                    Dallas 1-wire Communication Interface\Source           /
//                    Code\IAR\polled\Debug\List\" -lA "Z:\qvcs\AVR318       /
//                    Dallas 1-wire Communication Interface\Source           /
//                    Code\IAR\polled\Debug\List\" --initializers_in_flash   /
//                    --root_variables -z2 --no_cse --no_inline              /
//                    --no_code_motion --no_cross_call --no_clustering       /
//                    --debug -DENABLE_BIT_DEFINITIONS -e -I "C:\Program     /
//                    Files\IAR Systems\Embedded Workbench 3.2\avr\INC\" -I  /
//                    "C:\Program Files\IAR Systems\Embedded Workbench       /
//                    3.2\avr\INC\CLIB\" --eeprom_size 1024 "Z:\qvcs\AVR318  /
//                    Dallas 1-wire Communication Interface\Source           /
//                    Code\IAR\polled\OWIUARTBitFunctions.c"                 /
//    List file    =  Z:\qvcs\AVR318 Dallas 1-wire Communication             /
//                    Interface\Source Code\IAR\polled\Debug\List\OWIUARTBit /
//                    Functions.s90                                          /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME OWIUARTBitFunctions

        RTMODEL "__64bit_doubles", "disabled"
        RTMODEL "__cpu", "3"
        RTMODEL "__cpu_name", "ATmega32"
        RTMODEL "__enhanced_core", "enabled"
        RTMODEL "__has_elpm", "false"
        RTMODEL "__memory_model", "2"
        RTMODEL "__rt_version", "3"

        RSEG CSTACK:DATA:NOROOT(0)
        RSEG RSTACK:DATA:NOROOT(0)

        PUBWEAK _A_ACSR
        PUBWEAK _A_ADC
        PUBWEAK _A_ADCSRA
        PUBWEAK _A_ADMUX
        PUBWEAK _A_ASSR
        PUBWEAK _A_DDRA
        PUBWEAK _A_DDRB
        PUBWEAK _A_DDRC
        PUBWEAK _A_DDRD
        PUBWEAK _A_EEAR
        PUBWEAK _A_EECR
        PUBWEAK _A_EEDR
        PUBWEAK _A_GICR
        PUBWEAK _A_GIFR
        PUBWEAK _A_ICR1
        PUBWEAK _A_MCUCR
        PUBWEAK _A_MCUCSR
        PUBWEAK _A_OCR0
        PUBWEAK _A_OCR1A
        PUBWEAK _A_OCR1B
        PUBWEAK _A_OCR2
        PUBWEAK _A_OSCCAL
        PUBWEAK _A_PINA
        PUBWEAK _A_PINB
        PUBWEAK _A_PINC
        PUBWEAK _A_PIND
        PUBWEAK _A_PORTA
        PUBWEAK _A_PORTB
        PUBWEAK _A_PORTC
        PUBWEAK _A_PORTD
        PUBWEAK _A_SFIOR
        PUBWEAK _A_SP
        PUBWEAK _A_SPCR
        PUBWEAK _A_SPDR
        PUBWEAK _A_SPMCR
        PUBWEAK _A_SPSR
        PUBWEAK _A_SREG
        PUBWEAK _A_TCCR0
        PUBWEAK _A_TCCR1A
        PUBWEAK _A_TCCR1B
        PUBWEAK _A_TCCR2
        PUBWEAK _A_TCNT0
        PUBWEAK _A_TCNT1
        PUBWEAK _A_TCNT2
        PUBWEAK _A_TIFR
        PUBWEAK _A_TIMSK
        PUBWEAK _A_TWAR
        PUBWEAK _A_TWBR
        PUBWEAK _A_TWCR
        PUBWEAK _A_TWDR
        PUBWEAK _A_TWSR
        PUBWEAK _A_UBRRH
        PUBWEAK _A_UBRRL
        PUBWEAK _A_UCSRA
        PUBWEAK _A_UCSRB
        PUBWEAK _A_UDR
        PUBWEAK _A_WDTCR
        PUBWEAK __?EEARH
        PUBWEAK __?EEARL
        PUBWEAK __?EECR
        PUBWEAK __?EEDR

        ASEGN ABSOLUTE:DATA:ROOT,03eH
// union <unnamed> volatile __io _A_EEAR
_A_EEAR:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,040H
// union <unnamed> volatile __io _A_UBRRH
_A_UBRRH:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,041H
// union <unnamed> volatile __io _A_WDTCR
_A_WDTCR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,042H
// union <unnamed> volatile __io _A_ASSR
_A_ASSR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,043H
// union <unnamed> volatile __io _A_OCR2
_A_OCR2:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,044H
// union <unnamed> volatile __io _A_TCNT2
_A_TCNT2:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,045H
// union <unnamed> volatile __io _A_TCCR2
_A_TCCR2:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,046H
// union <unnamed> volatile __io _A_ICR1
_A_ICR1:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,048H
// union <unnamed> volatile __io _A_OCR1B
_A_OCR1B:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,04aH
// union <unnamed> volatile __io _A_OCR1A
_A_OCR1A:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,04cH
// union <unnamed> volatile __io _A_TCNT1
_A_TCNT1:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,04eH
// union <unnamed> volatile __io _A_TCCR1B
_A_TCCR1B:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,04fH
// union <unnamed> volatile __io _A_TCCR1A
_A_TCCR1A:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,050H
// union <unnamed> volatile __io _A_SFIOR
_A_SFIOR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,051H
// union <unnamed> volatile __io _A_OSCCAL
_A_OSCCAL:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,052H
// union <unnamed> volatile __io _A_TCNT0
_A_TCNT0:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,053H
// union <unnamed> volatile __io _A_TCCR0
_A_TCCR0:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,054H
// union <unnamed> volatile __io _A_MCUCSR
_A_MCUCSR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,055H
// union <unnamed> volatile __io _A_MCUCR
_A_MCUCR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,056H
// union <unnamed> volatile __io _A_TWCR
_A_TWCR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,057H
// union <unnamed> volatile __io _A_SPMCR
_A_SPMCR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,058H
// union <unnamed> volatile __io _A_TIFR
_A_TIFR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,059H
// union <unnamed> volatile __io _A_TIMSK
_A_TIMSK:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,05aH
// union <unnamed> volatile __io _A_GIFR
_A_GIFR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,05bH
// union <unnamed> volatile __io _A_GICR
_A_GICR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,05cH
// union <unnamed> volatile __io _A_OCR0
_A_OCR0:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,05dH
// union <unnamed> volatile __io _A_SP
_A_SP:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,05fH
// union <unnamed> volatile __io _A_SREG
_A_SREG:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,020H
// union <unnamed> volatile __io _A_TWBR
_A_TWBR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,021H
// union <unnamed> volatile __io _A_TWSR
_A_TWSR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,022H
// union <unnamed> volatile __io _A_TWAR
_A_TWAR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,023H
// union <unnamed> volatile __io _A_TWDR
_A_TWDR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,024H
// union <unnamed> volatile __io _A_ADC
_A_ADC:
        DS 2

        ASEGN ABSOLUTE:DATA:ROOT,026H
// union <unnamed> volatile __io _A_ADCSRA
_A_ADCSRA:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,027H
// union <unnamed> volatile __io _A_ADMUX
_A_ADMUX:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,028H
// union <unnamed> volatile __io _A_ACSR
_A_ACSR:
        DS 1

        ASEGN ABSOLUTE:DATA:ROOT,029H