?? mycpu.fit.qmsg
字號:
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" { } { } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." { } { } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "CLK Global clock in PIN 29 " "Info: Automatically promoted some destinations of signal \"CLK\" to use Global clock in PIN 29" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "40 " "Info: Destination \"40\" may be non-global or may not use global clock" { } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 600 912 976 640 "40" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|12 " "Info: Destination \"8cpu:92\|12\" may be non-global or may not use global clock" { } { { "8cpu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/8cpu.bdf" { { 384 1608 1648 448 "12" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|59~44 " "Info: Destination \"8cpu:92\|59~44\" may be non-global or may not use global clock" { } { { "8cpu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/8cpu.bdf" { { 392 128 168 456 "59" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|alu:62\|21 " "Info: Destination \"8cpu:92\|alu:62\|21\" may be non-global or may not use global clock" { } { { "alu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/alu.bdf" { { 328 216 280 368 "21" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|alu:62\|18 " "Info: Destination \"8cpu:92\|alu:62\|18\" may be non-global or may not use global clock" { } { { "alu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/alu.bdf" { { 208 216 280 248 "18" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "17 " "Info: Destination \"17\" may be non-global or may not use global clock" { } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 256 312 376 296 "17" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "19 " "Info: Destination \"19\" may be non-global or may not use global clock" { } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 144 40 80 208 "19" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|alu:62\|22 " "Info: Destination \"8cpu:92\|alu:62\|22\" may be non-global or may not use global clock" { } { { "alu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/alu.bdf" { { 392 712 776 432 "22" "" } } } } } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "8cpu:92\|14 " "Info: Destination \"8cpu:92\|14\" may be non-global or may not use global clock" { } { { "8cpu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/8cpu.bdf" { { 448 1064 1104 512 "14" "" } } } } } 0} } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 296 8 24 464 "CLK" "" } { 272 56 312 288 "CLK" "" } { 392 672 712 408 "CLK" "" } { 920 416 472 936 "CLK" "" } { 160 768 784 272 "CLK" "" } { 616 832 856 656 "CLK" "" } } } } } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "40 Global clock " "Info: Automatically promoted signal \"40\" to use Global clock" { } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 600 912 976 640 "40" "" } } } } } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "19 Global clock " "Info: Automatically promoted signal \"19\" to use Global clock" { } { { "cpu001.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/cpu001.bdf" { { 144 40 80 208 "19" "" } } } } } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "8cpu:92\|12 Global clock " "Info: Automatically promoted signal \"8cpu:92\|12\" to use Global clock" { } { { "8cpu.bdf" "" { Schematic "F:/Tool/quartusii/mycpu/8cpu.bdf" { { 384 1608 1648 448 "12" "" } } } } } 0}
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