AB1_q_a[1]_PORT_A_data_out = MEMORY(AB1_q_a[1]_PORT_A_data_in_reg, , AB1_q_a[1]_PORT_A_address_reg, AB1_q_a[1]_PORT_B_address_reg, AB1_q_a[1]_PORT_A_write_enable_reg, , , , AB1_q_a[1]_clock_0, , , , , );
AB1_q_a[1]_PORT_A_data_out_reg = DFFE(AB1_q_a[1]_PORT_A_data_out, AB1_q_a[1]_clock_0, , , );
AB1_q_a[1] = AB1_q_a[1]_PORT_A_data_out_reg[0];


--U4L3 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result25w~16
--operation mode is normal

U4L3 = U4L51 & (U4L61) # !U4L51 & (U4L61 & B9_18 # !U4L61 & (AB1_q_a[1]));


--U4L4 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result25w~17
--operation mode is normal

U4L4 = U4L51 & (U4L3 & (kdata[2]) # !U4L3 & Z2L02) # !U4L51 & (U4L3);


--M2L7 is 8cpu:92|pc:65|74161:8|f74161:sub|85~0
--operation mode is arithmetic

M2L7_carry_eqn = M2_81;
M2L7 = M2_87 $ (M2L7_carry_eqn);

--M2_85 is 8cpu:92|pc:65|74161:8|f74161:sub|85
--operation mode is arithmetic

M2_85 = CARRY(!M2_81 # !M2_87);


--B9_19 is 8cpu:92|alu:62|74273b:11|19
--operation mode is normal

B9_19_lut_out = Y3L61;
B9_19 = DFFEAS(B9_19_lut_out, P1_22, VCC, , , , , , );


--Z2L71 is 8cpu:92|bi74670:67|74670c:34|107~11
--operation mode is normal

Z2L71 = 69 & (68) # !69 & (68 & Z2_20 # !68 & (Z2_5));


--Z2L81 is 8cpu:92|bi74670:67|74670c:34|107~12
--operation mode is normal

Z2L81 = 69 & (Z2L71 & (Z2_29) # !Z2L71 & Z2_19) # !69 & (Z2L71);


--AB1_q_a[0] is 8cpu:92|lpm_ram_dq0:inst|altsyncram:altsyncram_component|altsyncram_td41:auto_generated|q_a[0]
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
AB1_q_a[0]_PORT_A_data_in = M2L2;
AB1_q_a[0]_PORT_A_data_in_reg = DFFE(AB1_q_a[0]_PORT_A_data_in, AB1_q_a[0]_clock_0, , , );
AB1_q_a[0]_PORT_A_address = BUS(B5_19, B5_18, B5_17, B5_16, B5_15, B5_14, B5_13, B5_12);
AB1_q_a[0]_PORT_A_address_reg = DFFE(AB1_q_a[0]_PORT_A_address, AB1_q_a[0]_clock_0, , , );
AB1_q_a[0]_PORT_B_address = BUS(B5_19, B5_18, B5_17, B5_16, B5_15, B5_14, B5_13, B5_12);
AB1_q_a[0]_PORT_B_address_reg = DFFE(AB1_q_a[0]_PORT_B_address, AB1_q_a[0]_clock_0, , , );
AB1_q_a[0]_PORT_A_write_enable = 70;
AB1_q_a[0]_PORT_A_write_enable_reg = DFFE(AB1_q_a[0]_PORT_A_write_enable, AB1_q_a[0]_clock_0, , , );
AB1_q_a[0]_clock_0 = CLK;
AB1_q_a[0]_PORT_A_data_out = MEMORY(AB1_q_a[0]_PORT_A_data_in_reg, , AB1_q_a[0]_PORT_A_address_reg, AB1_q_a[0]_PORT_B_address_reg, AB1_q_a[0]_PORT_A_write_enable_reg, , , , AB1_q_a[0]_clock_0, , , , , );
AB1_q_a[0]_PORT_A_data_out_reg = DFFE(AB1_q_a[0]_PORT_A_data_out, AB1_q_a[0]_clock_0, , , );
AB1_q_a[0] = AB1_q_a[0]_PORT_A_data_out_reg[0];


--U4L1 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result11w~16
--operation mode is normal

U4L1 = U4L61 & (U4L51) # !U4L61 & (U4L51 & Z2L81 # !U4L51 & (AB1_q_a[0]));


--U4L2 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result11w~17
--operation mode is normal

U4L2 = U4L61 & (U4L1 & (kdata[1]) # !U4L1 & B9_19) # !U4L61 & (U4L1);


--M2L4 is 8cpu:92|pc:65|74161:8|f74161:sub|81~0
--operation mode is arithmetic

M2L4 = M2_9;

--M2_81 is 8cpu:92|pc:65|74161:8|f74161:sub|81
--operation mode is arithmetic

M2_81 = CARRY(M2_9);


--P1_21 is 8cpu:92|alu:62|21
--operation mode is normal

P1_21 = J1L2 & B1_17 & CLK;


--P1_18 is 8cpu:92|alu:62|18
--operation mode is normal

P1_18 = J1L2 & B1_16 & CLK;


--B8_13 is 8cpu:92|alu:62|74273b:5|13
--operation mode is normal

B8_13_lut_out = M3L51;
B8_13 = DFFEAS(B8_13_lut_out, P1_21, VCC, , , , , , );


--B7_13 is 8cpu:92|alu:62|74273b:4|13
--operation mode is normal

B7_13_lut_out = M3L51;
B7_13 = DFFEAS(B7_13_lut_out, P1_18, VCC, , , , , , );


--Y3L6 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~166
--operation mode is arithmetic

Y3L6_carry_eqn = Y3L9;
Y3L6 = B8_14 $ B7_14 $ Y3L6_carry_eqn;

--Y3L7 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~168
--operation mode is arithmetic

Y3L7 = CARRY(B8_14 & !B7_14 & !Y3L9 # !B8_14 & (!Y3L9 # !B7_14));


--17 is 17
--operation mode is normal

17 = J1L1 & CLK;


--19 is 19
--operation mode is normal

19 = J1L2 & B2_14 & CLK;


--76 is 76
--operation mode is normal

76 = B4_12 & J1_35 # !CLRN;


--Z1L41 is 8cpu:92|bi74670:67|74670c:32|82~36
--operation mode is normal

Z1L41 = B3_17 & (!B3_16);


--93 is 93
--operation mode is normal

93 = J1L2 & B2_18;


--Z1_85 is 8cpu:92|bi74670:67|74670c:32|85
--operation mode is normal

Z1_85 = Z1L41 & (93 & M3L81 # !93 & (Z1_85)) # !Z1L41 & (Z1_85);


--Z1L51 is 8cpu:92|bi74670:67|74670c:32|82~37
--operation mode is normal

Z1L51 = B3_16 & (!B3_17);


--Z1_86 is 8cpu:92|bi74670:67|74670c:32|86
--operation mode is normal

Z1_86 = Z1L51 & (93 & M3L81 # !93 & (Z1_86)) # !Z1L51 & (Z1_86);


--Z1L91 is 8cpu:92|bi74670:67|74670c:32|92~3
--operation mode is normal

Z1L91 = B3_17 # B3_16;


--Z1_95 is 8cpu:92|bi74670:67|74670c:32|95
--operation mode is normal

Z1_95 = Z1L91 & (Z1_95) # !Z1L91 & (93 & M3L81 # !93 & (Z1_95));


--Z1L61 is 8cpu:92|bi74670:67|74670c:32|82~38
--operation mode is normal

Z1L61 = B3_17 & B3_16;


--Z1_76 is 8cpu:92|bi74670:67|74670c:32|76
--operation mode is normal

Z1_76 = Z1L61 & (93 & M3L81 # !93 & (Z1_76)) # !Z1L61 & (Z1_76);


--P1_22 is 8cpu:92|alu:62|22
--operation mode is normal

P1_22 = J1_35 & B1_18 & CLK;


--70 is 70
--operation mode is normal

70 = J1L2 & B2_17;


--B5_19 is 8cpu:92|74273b:3|19
--operation mode is normal

B5_19_lut_out = M2L2;
B5_19 = DFFEAS(B5_19_lut_out, H1_14, VCC, , , , , , );


--B5_18 is 8cpu:92|74273b:3|18
--operation mode is normal

B5_18_lut_out = M2L9;
B5_18 = DFFEAS(B5_18_lut_out, H1_14, VCC, , , , , , );


--B5_17 is 8cpu:92|74273b:3|17
--operation mode is normal

B5_17_lut_out = M2L31;
B5_17 = DFFEAS(B5_17_lut_out, H1_14, VCC, , , , , , );


--B5_16 is 8cpu:92|74273b:3|16
--operation mode is normal

B5_16_lut_out = M2L71;
B5_16 = DFFEAS(B5_16_lut_out, H1_14, VCC, , , , , , );


--B5_15 is 8cpu:92|74273b:3|15
--operation mode is normal

B5_15_lut_out = M3L2;
B5_15 = DFFEAS(B5_15_lut_out, H1_14, VCC, , , , , , );


--B5_14 is 8cpu:92|74273b:3|14
--operation mode is normal

B5_14_lut_out = M3L11;
B5_14 = DFFEAS(B5_14_lut_out, H1_14, VCC, , , , , , );


--B5_13 is 8cpu:92|74273b:3|13
--operation mode is normal

B5_13_lut_out = M3L51;
B5_13 = DFFEAS(B5_13_lut_out, H1_14, VCC, , , , , , );


--B5_12 is 8cpu:92|74273b:3|12
--operation mode is normal

B5_12_lut_out = M3L81;
B5_12 = DFFEAS(B5_12_lut_out, H1_14, VCC, , , , , , );


--M3_107 is 8cpu:92|pc:65|74161:9|f74161:sub|107
--operation mode is normal

M3_107_carry_eqn = M3_95;
M3_107 = M3_110 $ (!M3_107_carry_eqn & M3L7);


--Z1_65 is 8cpu:92|bi74670:67|74670c:32|65
--operation mode is normal

Z1_65 = Z1L51 & (93 & M3L51 # !93 & (Z1_65)) # !Z1L51 & (Z1_65);


--Z1_66 is 8cpu:92|bi74670:67|74670c:32|66
--operation mode is normal

Z1_66 = Z1L41 & (93 & M3L51 # !93 & (Z1_66)) # !Z1L41 & (Z1_66);


--Z1_56 is 8cpu:92|bi74670:67|74670c:32|56
--operation mode is normal

Z1_56 = Z1L91 & (Z1_56) # !Z1L91 & (93 & M3L51 # !93 & (Z1_56));


--Z1_75 is 8cpu:92|bi74670:67|74670c:32|75
--operation mode is normal

Z1_75 = Z1L61 & (93 & M3L51 # !93 & (Z1_75)) # !Z1L61 & (Z1_75);


--Z1_39 is 8cpu:92|bi74670:67|74670c:32|39
--operation mode is normal

Z1_39 = Z1L41 & (93 & M3L11 # !93 & (Z1_39)) # !Z1L41 & (Z1_39);


--Z1_40 is 8cpu:92|bi74670:67|74670c:32|40
--operation mode is normal

Z1_40 = Z1L51 & (93 & M3L11 # !93 & (Z1_40)) # !Z1L51 & (Z1_40);


--Z1_51 is 8cpu:92|bi74670:67|74670c:32|51
--operation mode is normal

Z1_51 = Z1L91 & (Z1_51) # !Z1L91 & (93 & M3L11 # !93 & (Z1_51));


--Z1_30 is 8cpu:92|bi74670:67|74670c:32|30
--operation mode is normal

Z1_30 = Z1L61 & (93 & M3L11 # !93 & (Z1_30)) # !Z1L61 & (Z1_30);


--Y3L8 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~171
--operation mode is arithmetic

Y3L8_carry_eqn = Y3L11;
Y3L8 = B8_15 $ B7_15 $ !Y3L8_carry_eqn;

--Y3L9 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~173
--operation mode is arithmetic

Y3L9 = CARRY(B8_15 & (B7_15 # !Y3L11) # !B8_15 & B7_15 & !Y3L11);


--Z1_19 is 8cpu:92|bi74670:67|74670c:32|19
--operation mode is normal

Z1_19 = Z1L51 & (93 & M3L2 # !93 & (Z1_19)) # !Z1L51 & (Z1_19);


--Z1_20 is 8cpu:92|bi74670:67|74670c:32|20
--operation mode is normal

Z1_20 = Z1L41 & (93 & M3L2 # !93 & (Z1_20)) # !Z1L41 & (Z1_20);


--Z1_5 is 8cpu:92|bi74670:67|74670c:32|5
--operation mode is normal

Z1_5 = Z1L91 & (Z1_5) # !Z1L91 & (93 & M3L2 # !93 & (Z1_5));


--Z1_29 is 8cpu:92|bi74670:67|74670c:32|29
--operation mode is normal

Z1_29 = Z1L61 & (93 & M3L2 # !93 & (Z1_29)) # !Z1L61 & (Z1_29);


--Z2_85 is 8cpu:92|bi74670:67|74670c:34|85
--operation mode is normal

Z2_85 = Z1L41 & (93 & M2L71 # !93 & (Z2_85)) # !Z1L41 & (Z2_85);


--Z2_86 is 8cpu:92|bi74670:67|74670c:34|86
--operation mode is normal

Z2_86 = Z1L51 & (93 & M2L71 # !93 & (Z2_86)) # !Z1L51 & (Z2_86);


--Z2_95 is 8cpu:92|bi74670:67|74670c:34|95
--operation mode is normal

Z2_95 = Z1L91 & (Z2_95) # !Z1L91 & (93 & M2L71 # !93 & (Z2_95));


--Z2_76 is 8cpu:92|bi74670:67|74670c:34|76
--operation mode is normal

Z2_76 = Z1L61 & (93 & M2L71 # !93 & (Z2_76)) # !Z1L61 & (Z2_76);


--Y3L01 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~176
--operation mode is arithmetic

Y3L01_carry_eqn = Y3L31;
Y3L01 = B8_16 $ B7_16 $ Y3L01_carry_eqn;

--Y3L11 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~178
--operation mode is arithmetic

Y3L11 = CARRY(B8_16 & !B7_16 & !Y3L31 # !B8_16 & (!Y3L31 # !B7_16));


--Y3L21 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~181
--operation mode is arithmetic

Y3L21_carry_eqn = Y3L51;
Y3L21 = B8_17 $ B7_17 $ !Y3L21_carry_eqn;

--Y3L31 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~183
--operation mode is arithmetic

Y3L31 = CARRY(B8_17 & (B7_17 # !Y3L51) # !B8_17 & B7_17 & !Y3L51);


--Z2_65 is 8cpu:92|bi74670:67|74670c:34|65
--operation mode is normal

Z2_65 = Z1L51 & (93 & M2L31 # !93 & (Z2_65)) # !Z1L51 & (Z2_65);


--Z2_66 is 8cpu:92|bi74670:67|74670c:34|66
--operation mode is normal

Z2_66 = Z1L41 & (93 & M2L31 # !93 & (Z2_66)) # !Z1L41 & (Z2_66);


--Z2_56 is 8cpu:92|bi74670:67|74670c:34|56
--operation mode is normal

Z2_56 = Z1L91 & (Z2_56) # !Z1L91 & (93 & M2L31 # !93 & (Z2_56));


--Z2_75 is 8cpu:92|bi74670:67|74670c:34|75
--operation mode is normal

Z2_75 = Z1L61 & (93 & M2L31 # !93 & (Z2_75)) # !Z1L61 & (Z2_75);


--Z2_39 is 8cpu:92|bi74670:67|74670c:34|39
--operation mode is normal

Z2_39 = Z1L41 & (93 & M2L9 # !93 & (Z2_39)) # !Z1L41 & (Z2_39);


--Z2_40 is 8cpu:92|bi74670:67|74670c:34|40
--operation mode is normal

Z2_40 = Z1L51 & (93 & M2L9 # !93 & (Z2_40)) # !Z1L51 & (Z2_40);


--Z2_51 is 8cpu:92|bi74670:67|74670c:34|51