;/*************************************************************************/
;/*                                                                       */
;/* FILE NAME                                      VERSION                */
;/*                                                                       */
;/*                                        ARM2132 Board version 1.0      */
;/*                                                                       */
;/* COMPONENT                                                             */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*     ARM7TDMI for LPC2132 ASSEBLER SYSTEM HEADER FILE     */
;/*                                                                       */
;/* AUTHOR                                                                */
;/*                                                                       */
;/*     Dr WangZhenXing  ,TsingHua University                             */
;/*        2005-4-18     www.wL88.net                                                               */
;/*************************************************************************/
;/* Format of the Program Status Register                                 */
;/*************************************************************************/
;/*                                                                       */
;/* 31  30  29   28         7   6   5   4   3   2   1   0                 */
;/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+---+               */
;/*| N | Z | C | V |      | I | F | T |     M4 ~ M0       |               */
;/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+---+               */
;/*                                                                       */
;/* Processor Mode and Mask                                               */
;/*                                                                       */
;/*************************************************************************/
;



Mode_USR        EQU     0x10
Mode_FIQ        EQU     0x11
Mode_IRQ        EQU     0x12
Mode_SVC        EQU     0x13
Mode_ABT        EQU     0x17
Mode_UND        EQU     0x1B
Mode_SYS        EQU     0x1F ; available on ARM Arch 4 and later

MASK_MODE		EQU		0x0000003F
MODE_SVC32		EQU		0x00000013

I_BIT           EQU     0x80 ; when I bit is set, IRQ is disabled
F_BIT           EQU     0x40 ; when F bit is set, FIQ is disabled


; --- System memory locations

MEMMAP            EQU     0xE01FC0C4          ; Address of MEMMAP
Remap_Ram         EQU     0x04                ; remap for ram execution
Remap_Boot        EQU     0x00                ;remap for boot blocks   

; --- Amount of memory (in bytes) allocated for stacks

Len_FIQ_Stack    EQU     40
Len_IRQ_Stack    EQU     40
Len_ABT_Stack    EQU     0
Len_UND_Stack    EQU     0
Len_SVC_Stack    EQU     1024
Len_USR_Stack    EQU     0
Len_SYS_Stack    EQU     0

; Add lengths >0 for FIQ_Stack, ABT_Stack, UND_Stack if you need them.
; Offsets will be loaded as immediate values.
; Offsets must be 8 byte aligned.

Offset_FIQ_Stack         EQU     0
Offset_IRQ_Stack         EQU     Offset_FIQ_Stack + Len_FIQ_Stack
Offset_ABT_Stack         EQU     Offset_IRQ_Stack + Len_IRQ_Stack
Offset_UND_Stack         EQU     Offset_ABT_Stack + Len_ABT_Stack
Offset_SVC_Stack         EQU     Offset_UND_Stack + Len_UND_Stack
Offset_USR_Stack         EQU     Offset_SVC_Stack + Len_SVC_Stack	
Offset_SYS_Stack         EQU     Offset_USR_Stack + Len_USR_Stack		


;/*************************************************************************/
;/*  SYSTEM STACK MEMORY  : 8K bytes system stacks are defined at memory.a
;/*************************************************************************/
USR_STACK_SIZE  EQU     1024 
UDF_STACK_SIZE  EQU      0 
ABT_STACK_SIZE  EQU      0 
IRQ_STACK_SIZE  EQU     1024 
FIQ_STACK_SIZE  EQU     1024 
SUP_STACK_SIZE  EQU     2048 



;/*************************************************************************/
;/*  SYSTEM USER STACK MEMORY
;/*************************************************************************/
SYSTEM_SIZE     EQU     1024      ; Define the system stack size
TIMER_SIZE      EQU     1024      ; Define timer HISR stack size
TIMER_PRIORITY  EQU     2         ; Timer HISR priority (values from
				  ; 0 to 2, where 0 is highest)

;/* EXTERNAL MEMORY CONTROLLER (EMC) */
;/*