ColWindow <= #Tp 1'b1;  else    begin        if(~Collision & ByteCnt[5:0] == CollValid[5:0] & (StateData[1] | StatePAD & NibCnt[0] | StateFCS & NibCnt[0]))        ColWindow <= #Tp 1'b0;      else      if(StateIdle | StateIPG)        ColWindow <= #Tp 1'b1;    endend// Start Windowalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    StatusLatch <= #Tp 1'b0;  else    begin      if(~TxStartFrm)        StatusLatch <= #Tp 1'b0;      else      if(ExcessiveDeferOccured | StateIdle)        StatusLatch <= #Tp 1'b1;     endend// Transmit packet used dataalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    TxUsedData <= #Tp 1'b0;  else    TxUsedData <= #Tp |StartData;end// Transmit packet donealways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    TxDone <= #Tp 1'b0;  else    begin      if(TxStartFrm & ~StatusLatch)        TxDone <= #Tp 1'b0;      else      if(StartTxDone)        TxDone <= #Tp 1'b1;    endend// Transmit packet retryalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    TxRetry <= #Tp 1'b0;  else    begin      if(TxStartFrm & ~StatusLatch)        TxRetry <= #Tp 1'b0;      else      if(StartTxRetry)        TxRetry <= #Tp 1'b1;     endend                                    // Transmit packet abortalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    TxAbort <= #Tp 1'b0;  else    begin      if(TxStartFrm & ~StatusLatch & ~ExcessiveDeferOccured)        TxAbort <= #Tp 1'b0;      else      if(StartTxAbort)        TxAbort <= #Tp 1'b1;    endend// Retry counteralways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    RetryCnt[3:0] <= #Tp 4'h0;  else    begin      if(ExcessiveDeferOccured | UnderRun | TooBig | StartTxDone | TxUnderRun           | StateJam & NibCntEq7 & (~ColWindow | RetryMax))        RetryCnt[3:0] <= #Tp 4'h0;      else      if(StateJam & NibCntEq7 & ColWindow & (RandomEq0 | NoBckof) | StateBackOff & RandomEqByteCnt)        RetryCnt[3:0] <= #Tp RetryCnt[3:0] + 1'b1;    endendassign RetryMax = RetryCnt[3:0] == MaxRet[3:0];// Transmit nibblealways @ (StatePreamble or StateData or StateData or StateFCS or StateJam or StateSFD or TxData or           Crc or NibCntEq15)begin  if(StateData[0])    MTxD_d[3:0] = TxData[3:0];                                  // Lower nibble  else  if(StateData[1])    MTxD_d[3:0] = TxData[7:4];                                  // Higher nibble  else  if(StateFCS)    MTxD_d[3:0] = {~Crc[28], ~Crc[29], ~Crc[30], ~Crc[31]};     // Crc  else  if(StateJam)    MTxD_d[3:0] = 4'h9;                                         // Jam pattern  else  if(StatePreamble)    if(NibCntEq15)      MTxD_d[3:0] = 4'hd;                                       // SFD    else      MTxD_d[3:0] = 4'h5;                                       // Preamble  else    MTxD_d[3:0] = 4'h0;end// Transmit Enablealways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    MTxEn <= #Tp 1'b0;  else    MTxEn <= #Tp StatePreamble | (|StateData) | StatePAD | StateFCS | StateJam;end// Transmit nibblealways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    MTxD[3:0] <= #Tp 4'h0;  else    MTxD[3:0] <= #Tp MTxD_d[3:0];end// Transmit erroralways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    MTxErr <= #Tp 1'b0;  else    MTxErr <= #Tp TooBig | UnderRun;end// WillTransmitalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    WillTransmit <= #Tp  1'b0;  else    WillTransmit <= #Tp StartPreamble | StatePreamble | (|StateData) | StatePAD | StateFCS | StateJam;endassign PacketFinished_d = StartTxDone | TooBig | UnderRun | LateCollision | MaxCollisionOccured | ExcessiveDeferOccured;// Packet finishedalways @ (posedge MTxClk or posedge Reset)begin  if(Reset)    begin      PacketFinished <= #Tp 1'b0;      PacketFinished_q  <= #Tp 1'b0;    end  else    begin      PacketFinished <= #Tp PacketFinished_d;      PacketFinished_q  <= #Tp PacketFinished;    endend// Connecting module Counterseth_txcounters txcounters1 (.StatePreamble(StatePreamble), .StateIPG(StateIPG), .StateData(StateData),                             .StatePAD(StatePAD), .StateFCS(StateFCS), .StateJam(StateJam), .StateBackOff(StateBackOff),                             .StateDefer(StateDefer), .StateIdle(StateIdle), .StartDefer(StartDefer), .StartIPG(StartIPG),                             .StartFCS(StartFCS), .StartJam(StartJam), .TxStartFrm(TxStartFrm), .MTxClk(MTxClk),                             .Reset(Reset), .MinFL(MinFL), .MaxFL(MaxFL), .HugEn(HugEn), .ExDfrEn(ExDfrEn),                             .PacketFinished_q(PacketFinished_q), .DlyCrcEn(DlyCrcEn), .StartBackoff(StartBackoff),                             .StateSFD(StateSFD), .ByteCnt(ByteCnt), .NibCnt(NibCnt), .ExcessiveDefer(ExcessiveDefer),                             .NibCntEq7(NibCntEq7), .NibCntEq15(NibCntEq15), .MaxFrame(MaxFrame), .NibbleMinFl(NibbleMinFl),                             .DlyCrcCnt(DlyCrcCnt)                           );// Connecting module StateMeth_txstatem txstatem1 (.MTxClk(MTxClk), .Reset(Reset), .ExcessiveDefer(ExcessiveDefer), .CarrierSense(CarrierSense),                         .NibCnt(NibCnt[6:0]), .IPGT(IPGT), .IPGR1(IPGR1), .IPGR2(IPGR2), .FullD(FullD),                         .TxStartFrm(TxStartFrm), .TxEndFrm(TxEndFrm), .TxUnderRun(TxUnderRun), .Collision(Collision),                         .UnderRun(UnderRun), .StartTxDone(StartTxDone), .TooBig(TooBig), .NibCntEq7(NibCntEq7),                         .NibCntEq15(NibCntEq15), .MaxFrame(MaxFrame), .Pad(Pad), .CrcEn(CrcEn),                         .NibbleMinFl(NibbleMinFl), .RandomEq0(RandomEq0), .ColWindow(ColWindow), .RetryMax(RetryMax),                         .NoBckof(NoBckof), .RandomEqByteCnt(RandomEqByteCnt), .StateIdle(StateIdle),                         .StateIPG(StateIPG), .StatePreamble(StatePreamble), .StateData(StateData), .StatePAD(StatePAD),                         .StateFCS(StateFCS), .StateJam(StateJam), .StateJam_q(StateJam_q), .StateBackOff(StateBackOff),                         .StateDefer(StateDefer), .StartFCS(StartFCS), .StartJam(StartJam), .StartBackoff(StartBackoff),                         .StartDefer(StartDefer), .DeferIndication(DeferIndication), .StartPreamble(StartPreamble), .StartData(StartData), .StartIPG(StartIPG)                       );wire Enable_Crc;wire [3:0] Data_Crc;wire Initialize_Crc;assign Enable_Crc = ~StateFCS;assign Data_Crc[0] = StateData[0]? TxData[3] : StateData[1]? TxData[7] : 1'b0;assign Data_Crc[1] = StateData[0]? TxData[2] : StateData[1]? TxData[6] : 1'b0;assign Data_Crc[2] = StateData[0]? TxData[1] : StateData[1]? TxData[5] : 1'b0;assign Data_Crc[3] = StateData[0]? TxData[0] : StateData[1]? TxData[4] : 1'b0;assign Initialize_Crc = StateIdle | StatePreamble | (|DlyCrcCnt);// Connecting module Crceth_crc txcrc (.Clk(MTxClk), .Reset(Reset), .Data(Data_Crc), .Enable(Enable_Crc), .Initialize(Initialize_Crc),                .Crc(Crc), .CrcError(CrcError)              );// Connecting module Randometh_random random1 (.MTxClk(MTxClk), .Reset(Reset), .StateJam(StateJam), .StateJam_q(StateJam_q), .RetryCnt(RetryCnt),                     .NibCnt(NibCnt), .ByteCnt(ByteCnt[9:0]), .RandomEq0(RandomEq0), .RandomEqByteCnt(RandomEqByteCnt));endmodule