?? 89lv51.lst
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C51 COMPILER V7.20 89LV51 04/03/2006 11:52:42 PAGE 1
C51 COMPILER V7.20, COMPILATION OF MODULE 89LV51
OBJECT MODULE PLACED IN 89lv51.OBJ
COMPILER INVOKED BY: C:\KEIL\C51\BIN\C51.EXE 89lv51.c BROWSE INCDIR(D:\BAO\copy\24L01\新版24L01\source code new\24L01 so
-urce code\) DEBUG OBJECTEXTEND
line level source
1 #include <reg51.h>
2 #include <intrins.h>
3 #include "api.h"
4 /***************************************************/
5 #define uchar unsigned char
6 #define TX_ADR_WIDTH 5 // 5 bytes TX(RX) address width
7 #define TX_PLOAD_WIDTH 20 // 20 bytes TX payload
8
9 uchar const TX_ADDRESS[TX_ADR_WIDTH] = {0x34,0x43,0x10,0x10,0x01}; // Define a static TX address
10
11 uchar rx_buf[TX_PLOAD_WIDTH];
12 uchar tx_buf[TX_PLOAD_WIDTH];
13 uchar flag;
14 /**************************************************/
15 sbit CE = P2^5;
16 sbit CSN= P2^0;
17 sbit SCK= P2^1;
18 sbit MOSI= P2^2;
19 sbit MISO= P2^3;
20 sbit IRQ = P3^2;
21 /**************************************************/
22 uchar bdata sta;
23 sbit RX_DR =sta^6;
24 sbit TX_DS =sta^5;
25 sbit MAX_RT =sta^4;
26 /**************************************************/
27
28 /**************************************************
29 Function: init_io();
30 Description:
31 flash led one time,chip enable(ready to TX or RX Mode),
32 Spi disable,Spi clock line init high
33 /**************************************************/
34 void init_io(void)
35 {
36 1 P0=0x0f; // led light
37 1 CE=0; // chip enable
38 1 CSN=1; // Spi disable
39 1 SCK=0; // Spi clock line init high
40 1 P0=0xff; // led close
41 1 }
42 /**************************************************/
43
44 /**************************************************
45 Function: Inituart();
46
47 Description:
48 set uart working mode
49 /**************************************************/
50 void Inituart(void)
51 {
52 1 TMOD = 0x20; //timer1 working mode 1
53 1 TL1 = 0xfd; //f7=9600 for 16mhz Fosc,and ...
54 1 TH1 = 0xfd; //...fd=19200 for 11.0592mhz Fosc
C51 COMPILER V7.20 89LV51 04/03/2006 11:52:42 PAGE 2
55 1 SCON = 0xd8; //uart mode 3,ren==1
56 1 PCON = 0x80; //smod=0
57 1 TR1 = 1; //start timer1
58 1 }
59 /**************************************************/
60
61 /**************************************************
62 Function: init_int0();
63
64 Description:
65 enable int0 interrupt;
66 /**************************************************/
67 void init_int0(void)
68 {
69 1 EA=1;
70 1 EX0=1; // Enable int0 interrupt.
71 1 }
72 /**************************************************/
73
74 /**************************************************
75 Function: delay100();
76
77 Description:
78 delay 100ms
79 /**************************************************
80 void delay(uchar )
81 {
82 uchar x;
83 uchar y;
84 for(x=0;x<100;x++)
85 {
86 for(y=0;y<100;y++)
87 _nop_();
88 }
89 }
90
91 /**************************************************/
92 void delay_ms(unsigned int x)
93 {
94 1 unsigned int i,j;
95 1 i=0;
96 1 for(i=0;i<x;i++)
97 1 {
98 2 j=108;
99 2 ;
100 2 while(j--);
101 2 }
102 1 }
103 /**************************************************/
104
105 /**************************************************
106 Function: SPI_RW();
107
108 Description:
109 Writes one byte to nRF24L01, and return the byte read
110 from nRF24L01 during write, according to SPI protocol
111 /**************************************************/
112 uchar SPI_RW(uchar byte)
113 {
114 1 uchar bit_ctr;
115 1 for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit
116 1 {
C51 COMPILER V7.20 89LV51 04/03/2006 11:52:42 PAGE 3
117 2 MOSI = (byte & 0x80); // output 'byte', MSB to MOSI
118 2 byte = (byte << 1); // shift next bit into MSB..
119 2 SCK = 1; // Set SCK high..
120 2 byte |= MISO; // capture current MISO bit
121 2 SCK = 0; // ..then set SCK low again
122 2 }
123 1 return(byte); // return read byte
124 1 }
125 /**************************************************/
126
127 /**************************************************
128 Function: SPI_RW_Reg();
129
130 Description:
131 Writes value 'value' to register 'reg'
132 /**************************************************/
133 uchar SPI_RW_Reg(BYTE reg, BYTE value)
134 {
135 1 uchar status;
136 1
137 1 CSN = 0; // CSN low, init SPI transaction
138 1 status = SPI_RW(reg); // select register
139 1 SPI_RW(value); // ..and write value to it..
140 1 CSN = 1; // CSN high again
141 1
142 1 return(status); // return nRF24L01 status byte
143 1 }
144 /**************************************************/
145
146 /**************************************************
147 Function: SPI_Read();
148
149 Description:
150 Read one byte from nRF24L01 register, 'reg'
151 /**************************************************/
152 BYTE SPI_Read(BYTE reg)
153 {
154 1 BYTE reg_val;
155 1
156 1 CSN = 0; // CSN low, initialize SPI communication...
157 1 SPI_RW(reg); // Select register to read from..
158 1 reg_val = SPI_RW(0); // ..then read registervalue
159 1 CSN = 1; // CSN high, terminate SPI communication
160 1
161 1 return(reg_val); // return register value
162 1 }
163 /**************************************************/
164
165 /**************************************************
166 Function: SPI_Read_Buf();
167
168 Description:
169 Reads 'bytes' #of bytes from register 'reg'
170 Typically used to read RX payload, Rx/Tx address
171 /**************************************************/
172 uchar SPI_Read_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
173 {
174 1 uchar status,byte_ctr;
175 1
176 1 CSN = 0; // Set CSN low, init SPI tranaction
177 1 status = SPI_RW(reg); // Select register to write to and read status byte
178 1
C51 COMPILER V7.20 89LV51 04/03/2006 11:52:42 PAGE 4
179 1 for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
180 1 pBuf[byte_ctr] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01
181 1
182 1 CSN = 1; // Set CSN high again
183 1
184 1 return(status); // return nRF24L01 status byte
185 1 }
186 /**************************************************/
187
188 /**************************************************
189 Function: SPI_Write_Buf();
190
191 Description:
192 Writes contents of buffer '*pBuf' to nRF24L01
193 Typically used to write TX payload, Rx/Tx address
194 /**************************************************/
195 uchar SPI_Write_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
196 {
197 1 uchar status,byte_ctr;
198 1
199 1 CSN = 0; // Set CSN low, init SPI tranaction
200 1 status = SPI_RW(reg); // Select register to write to and read status byte
201 1 for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
202 1 SPI_RW(*pBuf++);
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