udelay(5);			eecd = E1000_READ_REG(hw, EECD);		}		if (!(eecd & E1000_EECD_GNT)) {			eecd &= ~E1000_EECD_REQ;			E1000_WRITE_REG(hw, EECD, eecd);			DEBUGOUT("Could not acquire EEPROM grant\n");			return FALSE;		}	}	e1000_setup_eeprom(hw);	e1000_shift_out_ee_bits(hw, EEPROM_EWEN_OPCODE, 5);	e1000_shift_out_ee_bits(hw, Reg, (large_eeprom) ? 6 : 4);	e1000_standby_eeprom(hw);	e1000_shift_out_ee_bits(hw, EEPROM_WRITE_OPCODE, 3);	e1000_shift_out_ee_bits(hw, Reg, (large_eeprom) ? 8 : 6);	e1000_shift_out_ee_bits(hw, Data, 16);	if (!e1000_wait_eeprom_done(hw)) {		return FALSE;	}	e1000_shift_out_ee_bits(hw, EEPROM_EWDS_OPCODE, 5);	e1000_shift_out_ee_bits(hw, Reg, (large_eeprom) ? 6 : 4);	e1000_eeprom_cleanup(hw);	/* Stop requesting EEPROM access */	if (hw->mac_type > e1000_82544) {		eecd = E1000_READ_REG(hw, EECD);		eecd &= ~E1000_EECD_REQ;		E1000_WRITE_REG(hw, EECD, eecd);	}	i = 0;	eecd = E1000_READ_REG(hw, EECD);	while (((eecd & E1000_EECD_GNT)) && (i < 500)) {		i++;		udelay(10);		eecd = E1000_READ_REG(hw, EECD);	}	if ((eecd & E1000_EECD_GNT)) {		DEBUGOUT("Could not release EEPROM grant\n");	}	return TRUE;}#endif/****************************************************************************** * Verifies that the EEPROM has a valid checksum * * hw - Struct containing variables accessed by shared code * * Reads the first 64 16 bit words of the EEPROM and sums the values read. * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is * valid. *****************************************************************************/static inte1000_validate_eeprom_checksum(struct eth_device *nic){	struct e1000_hw *hw = nic->priv;	uint16_t checksum = 0;	uint16_t i, eeprom_data;	DEBUGFUNC();	for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {		if (e1000_read_eeprom(hw, i, &eeprom_data) < 0) {			DEBUGOUT("EEPROM Read Error\n");			return -E1000_ERR_EEPROM;		}		checksum += eeprom_data;	}	if (checksum == (uint16_t) EEPROM_SUM) {		return 0;	} else {		DEBUGOUT("EEPROM Checksum Invalid\n");		return -E1000_ERR_EEPROM;	}}#endif /* #ifndef CONFIG_AP1000 *//****************************************************************************** * Reads the adapter's MAC address from the EEPROM and inverts the LSB for the * second function of dual function devices * * nic - Struct containing variables accessed by shared code *****************************************************************************/static inte1000_read_mac_addr(struct eth_device *nic){#ifndef CONFIG_AP1000	struct e1000_hw *hw = nic->priv;	uint16_t offset;	uint16_t eeprom_data;	int i;	DEBUGFUNC();	for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) {		offset = i >> 1;		if (e1000_read_eeprom(hw, offset, &eeprom_data) < 0) {			DEBUGOUT("EEPROM Read Error\n");			return -E1000_ERR_EEPROM;		}		nic->enetaddr[i] = eeprom_data & 0xff;		nic->enetaddr[i + 1] = (eeprom_data >> 8) & 0xff;	}	if ((hw->mac_type == e1000_82546) &&	    (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {		/* Invert the last bit if this is the second device */		nic->enetaddr[5] += 1;	}#else	/*	 * The AP1000's e1000 has no eeprom; the MAC address is stored in the	 * environment variables.  Currently this does not support the addition	 * of a PMC e1000 card, which is certainly a possibility, so this should	 * be updated to properly use the env variable only for the onboard e1000	 */	int ii;	char *s, *e;	DEBUGFUNC();	s = getenv ("ethaddr");	if (s == NULL){		return -E1000_ERR_EEPROM;	}	else{		for(ii = 0; ii < 6; ii++) {			nic->enetaddr[ii] = s ? simple_strtoul (s, &e, 16) : 0;			if (s){				s = (*e) ? e + 1 : e;			}		}	}#endif	return 0;}/****************************************************************************** * Initializes receive address filters. * * hw - Struct containing variables accessed by shared code * * Places the MAC address in receive address register 0 and clears the rest * of the receive addresss registers. Clears the multicast table. Assumes * the receiver is in reset when the routine is called. *****************************************************************************/static voide1000_init_rx_addrs(struct eth_device *nic){	struct e1000_hw *hw = nic->priv;	uint32_t i;	uint32_t addr_low;	uint32_t addr_high;	DEBUGFUNC();	/* Setup the receive address. */	DEBUGOUT("Programming MAC Address into RAR[0]\n");	addr_low = (nic->enetaddr[0] |		    (nic->enetaddr[1] << 8) |		    (nic->enetaddr[2] << 16) | (nic->enetaddr[3] << 24));	addr_high = (nic->enetaddr[4] | (nic->enetaddr[5] << 8) | E1000_RAH_AV);	E1000_WRITE_REG_ARRAY(hw, RA, 0, addr_low);	E1000_WRITE_REG_ARRAY(hw, RA, 1, addr_high);	/* Zero out the other 15 receive addresses. */	DEBUGOUT("Clearing RAR[1-15]\n");	for (i = 1; i < E1000_RAR_ENTRIES; i++) {		E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);		E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);	}}/****************************************************************************** * Clears the VLAN filer table * * hw - Struct containing variables accessed by shared code *****************************************************************************/static voide1000_clear_vfta(struct e1000_hw *hw){	uint32_t offset;	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++)		E1000_WRITE_REG_ARRAY(hw, VFTA, offset, 0);}/****************************************************************************** * Set the mac type member in the hw struct. * * hw - Struct containing variables accessed by shared code *****************************************************************************/static inte1000_set_mac_type(struct e1000_hw *hw){	DEBUGFUNC();	switch (hw->device_id) {	case E1000_DEV_ID_82542:		switch (hw->revision_id) {		case E1000_82542_2_0_REV_ID:			hw->mac_type = e1000_82542_rev2_0;			break;		case E1000_82542_2_1_REV_ID:			hw->mac_type = e1000_82542_rev2_1;			break;		default:			/* Invalid 82542 revision ID */			return -E1000_ERR_MAC_TYPE;		}		break;	case E1000_DEV_ID_82543GC_FIBER:	case E1000_DEV_ID_82543GC_COPPER:		hw->mac_type = e1000_82543;		break;	case E1000_DEV_ID_82544EI_COPPER:	case E1000_DEV_ID_82544EI_FIBER:	case E1000_DEV_ID_82544GC_COPPER:	case E1000_DEV_ID_82544GC_LOM:		hw->mac_type = e1000_82544;		break;	case E1000_DEV_ID_82540EM:	case E1000_DEV_ID_82540EM_LOM:		hw->mac_type = e1000_82540;		break;	case E1000_DEV_ID_82545EM_COPPER:	case E1000_DEV_ID_82545EM_FIBER:		hw->mac_type = e1000_82545;		break;	case E1000_DEV_ID_82546EB_COPPER:	case E1000_DEV_ID_82546EB_FIBER:		hw->mac_type = e1000_82546;		break;	default:		/* Should never have loaded on this device */		return -E1000_ERR_MAC_TYPE;	}	return E1000_SUCCESS;}/****************************************************************************** * Reset the transmit and receive units; mask and clear all interrupts. * * hw - Struct containing variables accessed by shared code *****************************************************************************/voide1000_reset_hw(struct e1000_hw *hw){	uint32_t ctrl;	uint32_t ctrl_ext;	uint32_t icr;	uint32_t manc;	DEBUGFUNC();	/* For 82542 (rev 2.0), disable MWI before issuing a device reset */	if (hw->mac_type == e1000_82542_rev2_0) {		DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");		pci_write_config_word(hw->pdev, PCI_COMMAND,				      hw->				      pci_cmd_word & ~PCI_COMMAND_INVALIDATE);	}	/* Clear interrupt mask to stop board from generating interrupts */	DEBUGOUT("Masking off all interrupts\n");	E1000_WRITE_REG(hw, IMC, 0xffffffff);	/* Disable the Transmit and Receive units.  Then delay to allow	 * any pending transactions to complete before we hit the MAC with	 * the global reset.	 */	E1000_WRITE_REG(hw, RCTL, 0);	E1000_WRITE_REG(hw, TCTL, E1000_TCTL_PSP);	E1000_WRITE_FLUSH(hw);	/* The tbi_compatibility_on Flag must be cleared when Rctl is cleared. */	hw->tbi_compatibility_on = FALSE;	/* Delay to allow any outstanding PCI transactions to complete before	 * resetting the device	 */	mdelay(10);	/* Issue a global reset to the MAC.  This will reset the chip's	 * transmit, receive, DMA, and link units.  It will not effect	 * the current PCI configuration.  The global reset bit is self-	 * clearing, and should clear within a microsecond.	 */	DEBUGOUT("Issuing a global reset to MAC\n");	ctrl = E1000_READ_REG(hw, CTRL);#if 0	if (hw->mac_type > e1000_82543)		E1000_WRITE_REG_IO(hw, CTRL, (ctrl | E1000_CTRL_RST));	else#endif		E1000_WRITE_REG(hw, CTRL, (ctrl | E1000_CTRL_RST));	/* Force a reload from the EEPROM if necessary */	if (hw->mac_type < e1000_82540) {		/* Wait for reset to complete */		udelay(10);		ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);		ctrl_ext |= E1000_CTRL_EXT_EE_RST;		E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);		E1000_WRITE_FLUSH(hw);		/* Wait for EEPROM reload */		mdelay(2);	} else {		/* Wait for EEPROM reload (it happens automatically) */		mdelay(4);		/* Dissable HW ARPs on ASF enabled adapters */		manc = E1000_READ_REG(hw, MANC);		manc &= ~(E1000_MANC_ARP_EN);		E1000_WRITE_REG(hw, MANC, manc);	}	/* Clear interrupt mask to stop board from generating interrupts */	DEBUGOUT("Masking off all interrupts\n");	E1000_WRITE_REG(hw, IMC, 0xffffffff);	/* Clear any pending interrupt events. */	icr = E1000_READ_REG(hw, ICR);	/* If MWI was previously enabled, reenable it. */	if (hw->mac_type == e1000_82542_rev2_0) {		pci_write_config_word(hw->pdev, PCI_COMMAND, hw->pci_cmd_word);	}}/****************************************************************************** * Performs basic configuration of the adapter. * * hw - Struct containing variables accessed by shared code * * Assumes that the controller has previously been reset and is in a * post-reset uninitialized state. Initializes the receive address registers, * multicast table, and VLAN filter table. Calls routines to setup link * configuration and flow control settings. Clears all on-chip counters. Leaves * the transmit and receive units disabled and uninitialized. *****************************************************************************/static inte1000_init_hw(struct eth_device *nic){	struct e1000_hw *hw = nic->priv;	uint32_t ctrl, status;	uint32_t i;	int32_t ret_val;	uint16_t pcix_cmd_word;	uint16_t pcix_stat_hi_word;	uint16_t cmd_mmrbc;	uint16_t stat_mmrbc;	e1000_bus_type bus_type = e1000_bus_type_unknown;	DEBUGFUNC();#if 0	/* Initialize Identification LED */	ret_val = e1000_id_led_init(hw);	if (ret_val < 0) {		DEBUGOUT("Error Initializing Identification LED\n");		return ret_val;	}#endif	/* Set the Media Type and exit with error if it is not valid. */	if (hw->mac_type != e1000_82543) {		/* tbi_compatibility is only valid on 82543 */		hw->tbi_compatibility_en = FALSE;	}	if (hw->mac_type >= e1000_82543) {		status = E1000_READ_REG(hw, STATUS);		if (status & E1000_STATUS_TBIMODE) {			hw->media_type = e1000_media_type_fiber;			/* tbi_compatibility not valid on fiber */			hw->tbi_compatibility_en = FALSE;		} else {			hw->media_type = e1000_media_type_copper;		}	} else {		/* This is an 82542 (fiber only) */		hw->media_type = e1000_media_type_fiber;	}	/* Disabling VLAN filtering. */	DEBUGOUT("Initializing the IEEE VLAN\n");	E1000_WRITE_REG(hw, VET, 0);	e1000_clear_vfta(hw);	/* For 82542 (rev 2.0), disable MWI and put the receiver into reset */	if (hw->mac_type == e1000_82542_rev2_0) {		DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");		pci_write_config_word(hw->pdev, PCI_COMMAND,				      hw->				      pci_cmd_word & ~PCI_COMMAND_INVALIDATE);		E1000_WRITE_REG(hw, RCTL, E1000_RCTL_RST);		E1000_WRITE_FLUSH(hw);		mdelay(5);	}