(ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);	printf("  Memory Select Error: %d\n\n",			(ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);	/* Capture data */	printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address);	printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n",			ddr->capture_data_hi, ddr->capture_data_lo);	printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",		ddr->capture_ecc & CAPTURE_ECC_ECE);	printf("Memory Error Attributes Capture:\n");	printf("  Data Beat Number: %d\n",			(ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> ECC_CAPT_ATTR_BNUM_SHIFT);	printf("  Transaction Size: %d\n",			(ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> ECC_CAPT_ATTR_TSIZ_SHIFT);	printf("  Transaction Source: %d\n",			(ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> ECC_CAPT_ATTR_TSRC_SHIFT);	printf("  Transaction Type: %d\n",			(ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> ECC_CAPT_ATTR_TTYP_SHIFT);	printf("  Error Information Valid: %d\n\n",			ddr->capture_attributes & ECC_CAPT_ATTR_VLD);}int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){	volatile immap_t *immap = (immap_t *)CFG_IMMR;	volatile ddr83xx_t *ddr = &immap->ddr;	volatile u32 val;	u64 *addr, count, val64;	register u64 *i;	if (argc > 4) {		printf ("Usage:\n%s\n", cmdtp->usage);		return 1;	}	if (argc == 2) {		if (strcmp(argv[1], "status") == 0) {			ecc_print_status();			return 0;		} else if (strcmp(argv[1], "captureclear") == 0) {			ddr->capture_address = 0;			ddr->capture_data_hi = 0;			ddr->capture_data_lo = 0;			ddr->capture_ecc = 0;			ddr->capture_attributes = 0;			return 0;		}	}	if (argc == 3) {		if (strcmp(argv[1], "sbecnt") == 0) {			val = simple_strtoul(argv[2], NULL, 10);			if (val > 255) {				printf("Incorrect Counter value, should be 0..255\n");				return 1;			}			val = (val << ECC_ERROR_MAN_SBEC_SHIFT);			val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);			ddr->err_sbe = val;			return 0;		} else if (strcmp(argv[1], "sbethr") == 0) {			val = simple_strtoul(argv[2], NULL, 10);			if (val > 255) {				printf("Incorrect Counter value, should be 0..255\n");				return 1;			}			val = (val << ECC_ERROR_MAN_SBET_SHIFT);			val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);			ddr->err_sbe = val;			return 0;		} else if (strcmp(argv[1], "errdisable") == 0) {			val = ddr->err_disable;			if (strcmp(argv[2], "+sbe") == 0) {				val |= ECC_ERROR_DISABLE_SBED;			} else if (strcmp(argv[2], "+mbe") == 0) {				val |= ECC_ERROR_DISABLE_MBED;			} else if (strcmp(argv[2], "+mse") == 0) {				val |= ECC_ERROR_DISABLE_MSED;			} else if (strcmp(argv[2], "+all") == 0) {				val |= (ECC_ERROR_DISABLE_SBED |					ECC_ERROR_DISABLE_MBED |					ECC_ERROR_DISABLE_MSED);			} else if (strcmp(argv[2], "-sbe") == 0) {				val &= ~ECC_ERROR_DISABLE_SBED;			} else if (strcmp(argv[2], "-mbe") == 0) {				val &= ~ECC_ERROR_DISABLE_MBED;			} else if (strcmp(argv[2], "-mse") == 0) {				val &= ~ECC_ERROR_DISABLE_MSED;			} else if (strcmp(argv[2], "-all") == 0) {				val &= ~(ECC_ERROR_DISABLE_SBED |					ECC_ERROR_DISABLE_MBED |					ECC_ERROR_DISABLE_MSED);			} else {				printf("Incorrect err_disable field\n");				return 1;			}			ddr->err_disable = val;			__asm__ __volatile__ ("sync");			__asm__ __volatile__ ("isync");			return 0;		} else if (strcmp(argv[1], "errdetectclr") == 0) {			val = ddr->err_detect;			if (strcmp(argv[2], "mme") == 0) {				val |= ECC_ERROR_DETECT_MME;			} else if (strcmp(argv[2], "sbe") == 0) {				val |= ECC_ERROR_DETECT_SBE;			} else if (strcmp(argv[2], "mbe") == 0) {				val |= ECC_ERROR_DETECT_MBE;			} else if (strcmp(argv[2], "mse") == 0) {				val |= ECC_ERROR_DETECT_MSE;			} else if (strcmp(argv[2], "all") == 0) {				val |= (ECC_ERROR_DETECT_MME |					ECC_ERROR_DETECT_MBE |					ECC_ERROR_DETECT_SBE |					ECC_ERROR_DETECT_MSE);			} else {				printf("Incorrect err_detect field\n");				return 1;			}			ddr->err_detect = val;			return 0;		} else if (strcmp(argv[1], "injectdatahi") == 0) {			val = simple_strtoul(argv[2], NULL, 16);			ddr->data_err_inject_hi = val;			return 0;		} else if (strcmp(argv[1], "injectdatalo") == 0) {			val = simple_strtoul(argv[2], NULL, 16);			ddr->data_err_inject_lo = val;			return 0;		} else if (strcmp(argv[1], "injectecc") == 0) {			val = simple_strtoul(argv[2], NULL, 16);			if (val > 0xff) {				printf("Incorrect ECC inject mask, should be 0x00..0xff\n");				return 1;			}			val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM);			ddr->ecc_err_inject = val;			return 0;		} else if (strcmp(argv[1], "inject") == 0) {			val = ddr->ecc_err_inject;			if (strcmp(argv[2], "en") == 0)				val |= ECC_ERR_INJECT_EIEN;			else if (strcmp(argv[2], "dis") == 0)				val &= ~ECC_ERR_INJECT_EIEN;			else				printf("Incorrect command\n");			ddr->ecc_err_inject = val;			__asm__ __volatile__ ("sync");			__asm__ __volatile__ ("isync");			return 0;		} else if (strcmp(argv[1], "mirror") == 0) {			val = ddr->ecc_err_inject;			if (strcmp(argv[2], "en") == 0)				val |= ECC_ERR_INJECT_EMB;			else if (strcmp(argv[2], "dis") == 0)				val &= ~ECC_ERR_INJECT_EMB;			else				printf("Incorrect command\n");			ddr->ecc_err_inject = val;			return 0;		}	}	if (argc == 4) {		if (strcmp(argv[1], "test") == 0) {			addr = (u64 *)simple_strtoul(argv[2], NULL, 16);			count = simple_strtoul(argv[3], NULL, 16);			if ((u32)addr % 8) {				printf("Address not alligned on double word boundary\n");				return 1;			}			disable_interrupts();			icache_disable();			for (i = addr; i < addr + count; i++) {				/* enable injects */				ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;				__asm__ __volatile__ ("sync");				__asm__ __volatile__ ("isync");				/* write memory location injecting errors */				*i = 0x1122334455667788ULL;				__asm__ __volatile__ ("sync");				/* disable injects */				ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;				__asm__ __volatile__ ("sync");				__asm__ __volatile__ ("isync");				/* read data, this generates ECC error */				val64 = *i;				__asm__ __volatile__ ("sync");				/* disable errors for ECC */				ddr->err_disable |= ~ECC_ERROR_ENABLE;				__asm__ __volatile__ ("sync");				__asm__ __volatile__ ("isync");				/* re-initialize memory, write the location again				 * NOT injecting errors this time */				*i = 0xcafecafecafecafeULL;				__asm__ __volatile__ ("sync");				/* enable errors for ECC */				ddr->err_disable &= ECC_ERROR_ENABLE;				__asm__ __volatile__ ("sync");				__asm__ __volatile__ ("isync");			}			icache_enable();			enable_interrupts();			return 0;		}	}	printf ("Usage:\n%s\n", cmdtp->usage);	return 1;}U_BOOT_CMD(	ecc,     4,     0,      do_ecc,	"ecc     - support for DDR ECC features\n",	"status              - print out status info\n"	"ecc captureclear        - clear capture regs data\n"	"ecc sbecnt <val>        - set Single-Bit Error counter\n"	"ecc sbethr <val>        - set Single-Bit Threshold\n"	"ecc errdisable <flag>   - clear/set disable Memory Error Disable, flag:\n"	"  [-|+]sbe - Single-Bit Error\n"	"  [-|+]mbe - Multiple-Bit Error\n"	"  [-|+]mse - Memory Select Error\n"	"  [-|+]all - all errors\n"	"ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"	"  mme - Multiple Memory Errors\n"	"  sbe - Single-Bit Error\n"	"  mbe - Multiple-Bit Error\n"	"  mse - Memory Select Error\n"	"  all - all errors\n"	"ecc injectdatahi <hi>  - set Memory Data Path Error Injection Mask High\n"	"ecc injectdatalo <lo>  - set Memory Data Path Error Injection Mask Low\n"	"ecc injectecc <ecc>    - set ECC Error Injection Mask\n"	"ecc inject <en|dis>    - enable/disable error injection\n"	"ecc mirror <en|dis>    - enable/disable mirror byte\n"	"ecc test <addr> <cnt>  - test mem region:\n"	"  - enables injects\n"	"  - writes pattern injecting errors\n"	"  - disables injects\n"	"  - reads pattern back, generates error\n"	"  - re-inits memory");#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)voidft_board_setup(void *blob, bd_t *bd){	u32 *p;	int len;#ifdef CONFIG_PCI	ft_pci_setup(blob, bd);#endif	ft_cpu_setup(blob, bd);	p = ft_get_prop(blob, "/memory/reg", &len);	if (p != NULL) {		*p++ = cpu_to_be32(bd->bi_memstart);		*p = cpu_to_be32(bd->bi_memsize);	}}#endif