################################################################################         INCASES Engineering GmbH EMC Device Library Setup File# Filename  :  b_setup.hrt# Version   :  2.0# Last Save :  Thu Sep 25 09:50:00 1997################################################################################## Vendors#VENDOR!AMD	SYN["AM","ADVANCED_MICRO_DEVICES"]	DSG["Advanced Micro Devices Inc. (AMD)"];VENDOR!CIR	SYN["CIRRUS","CIL","CL"]	DSG["Cirrus Logic (CIR)"];VENDOR!CMD	SYN["CMDM","CMD_MICRO"]	DSG["California Micro Devices Corparation (CMD)"];VENDOR!CYP	SYN["CP","CYPRES"]	DSG["CYPRES Semiconductor (CYP)"];VENDOR!DAL	SYN["DALL","DAS","DALLAS"]	DSG["Dallas Semiconductor (DAL)"];VENDOR!FU	SYN["FUI","FJU","FUJI"]	DSG["Fujitsu Microelectronics Inc. (FU)"];VENDOR!ICS	SYN["INC","INCASES"]	DSG["INCASES Engineering GmbH (ICS)"];VENDOR!INT	SYN["INTEL","ITL"]	DSG["intel Corporation (INT)"];VENDOR!LAT	SYN["LATTICE"]	DSG["Lattice Semiconductor (LAT)"];VENDOR!MMI	SYN["MONO","MOMEM"]	DSG["Monolithic Memory Inc. (MMI)"];VENDOR!MOT	SYN["MO","MOTO","MTR"]	DSG["Motorola Inc. (MOT)"];VENDOR!NSC	SYN["NATIONAL","NATIONAL_SEMICONDUCTOR"]	DSG["National Semiconductor (NSC)"];VENDOR!PHI	SYN["PHILIPS"]	DSG["Philips Semiconductors (PHI)"];VENDOR!SIE	SYN["SIEM","SIEMENS"]	DSG["SIEMENS AG (SIE)"];VENDOR!SNI	SYN["SIENIX"]	DSG["Siemens Nixdorf Informationssysteme AG (SNI)"];VENDOR!TI	SYN["TEX","TEXAS","TEXAS_INSTRUMENTS"]	DSG["Texas Instruments Inc. (TI)"];VENDOR!TOS	SYN["TC","TOSH","TOSHIBA"]	DSG["Toshiba America Electronic Components Inc. (TC)"];##### Families#FAMILY!54	SYN["SL","STANDARD_LOGIK"]	DSG["54er (54)"];FAMILY!74	SYN["SL","STANDARD_LOGIK"]	DSG["74er (74)"];FAMILY!75	DSG["75er (75)"];FAMILY!ASIC	SYN["ASIC"]	DSG["Application Specific IC"];FAMILY!CDC	SYN["CLK","CLK_DRIVER","CLOCK","CLOCK_DRIVER"]	DSG["Clock Distribution Circuits (CDC)"];FAMILY!CTRL	SYN["CON","CONT","CONTROL"]	DSG["Controller"];FAMILY!DRAM	SYN["DMEM","D_MEM","D_RAM","DYNAMIC_RAM"]	DSG["Dynamic RAM (DMEM)"];FAMILY!GAL	SYN["GENERIC_AL"]	DSG["Generic Array Logic (GAL)"];FAMILY!MCU	SYN["MC","MICROCONTROLLER"]	DSG["Microcontroller (MCU)"];FAMILY!MPU	SYN["MP","MICROPROCESSOR"]	DSG["Microprocessors (MPU)"];FAMILY!PAL	SYN["PROGRAMMABLE_AL"]	DSG["Programmable Array Logic (PAL)"];FAMILY!PLD	DSG["Programmable Logic Device (PLD)"];FAMILY!PROM	SYN["EPROM","EEPROM","FEPROM"]	DSG["Programmable ROM"];FAMILY!ROM	SYN["READ_ONLY_MEMORY"]	DSG["Read Only Memory (ROM)"];FAMILY!SRAM	SYN["SMEM","S_MEM","S_RAM","STATIC_RAM"]	DSG["Static RAM (SRAM)"];##### Signal Classes#SIGNALCLASS!SIGBUS	SYN["BUS","FBUS","DBUS"]	DSG["Bus"]	REP["[0-9]*[AB][0-9][0-9]*"];SIGNALCLASS!SIGCLK	SYN["CLK","CLOCK","DCLOCK"]	DSG["Clock"]	REP[".*[cC][lL][oO]\{0,1\}[cC]\{0,1\}[kK].*","[cC][kK][abioABIO]*.*"];SIGNALCLASS!SIGCTRL	SYN["CLR","CTEN","DIR","OE","WE"]	DSG["Control"]	REP[".*[dD][iI][rR].*","[cC][lL][rR].*",".*[oO][eE].*",".*[wW][eE].*"];SIGNALCLASS!SIGDATA	SYN["DAT","DQ"]	DSG["Data"]	REP["[0-9]*[adgqyADGQY]"];SIGNALCLASS!SIGSUP	SYN["GND","VCC","VSS"]	DSG["Supply"]	REP[".*[gG][nN][dD].*",".*[vV][csCS][csCS].*"];##### Technologies#TECHNOLOGY!ABT	SYN["ABT_MOS","ADVANCED_BICMOS"]	DSG["Advanced Bipolar CMOS Technology (ABT)"]	PAR["VICC"]("5"),["VISS"]("0"),		["VOCC"]("5"),["VOSS"]("0"),		["VILmax"](".8"),["VIHmin"]("2"),		["VOLmax"](".55"),["VOHmin"]("2"),		["VOLmin"]("-.5"),["VOHmax"]("5.5"),		["VIT"]("1.5")	SIGBUS["FBMI"]("ABT_040_S0_in.mac"),["FBMO"]("ABT_040_S0_out.mac"),		["FBMT"]("ABT_025_S0_tri.mac"),		["FWmin"]("30e6"),["FWmax"]("150e6"),["FWtyp"]("75e6"),		["IOHmax"]("-.032"),["IOLmax"](".064"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.5"),["VOmDF"]("1.5"),		["TITRmax"]("5E-9"),["TITFmax"]("5E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCLK["FBMI"]("ABT_040_S0_in.mac"),["FBMO"]("ABT_040_S0_out.mac"),		["FBMT"]("ABT_025_S0_tri.mac"),		["FWmin"]("30e6"),["FWmax"]("150e6"),["FWtyp"]("75e6"),		["IOHmax"]("-.032"),["IOLmax"](".064"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.5"),["VOmDF"]("1.5"),		["TITRmax"]("5E-9"),["TITFmax"]("5E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCTRL["FBMI"]("ABT_000_S0_in.mac"),["FBMO"]("ABT_040_S0_out.mac"),		["FBMT"]("ABT_025_S0_tri.mac"),		["FWmin"]("15e6"),["FWmax"]("100e6"),["FWtyp"]("40e6"),		["IOHmax"]("-.024"),["IOLmax"](".048"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.5"),["VOmDF"]("1.5"),		["TITRmax"]("5E-9"),["TITFmax"]("5E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDATA["FBMI"]("ABT_000_S0_in.mac"),["FBMO"]("ABT_040_S0_out.mac"),		["FBMT"]("ABT_025_S0_tri.mac"),		["FWmin"]("15e6"),["FWmax"]("100e6"),["FWtyp"]("40e6"),		["IOHmax"]("-.024"),["IOLmax"](".048"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.5"),["VOmDF"]("1.5"),		["TITRmax"]("5E-9"),["TITFmax"]("5E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDFT["SIGDFT"]("SIGUK")	SIGUK["FBMI"]("ABT_000_S0_in.mac"),["FBMO"]("ABT_040_S0_out.mac"),		["FBMT"]("ABT_025_S0_tri.mac"),		["FWmin"]("30e6"),["FWmax"]("150e6"),["FWtyp"]("75e6"),		["IOHmax"]("-.032"),["IOLmax"](".064"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.5"),["VOmDF"]("1.5"),		["TITRmax"]("5E-9"),["TITFmax"]("5E-9"),		["TOmDR"]("0"),["TOmDF"]("0");TECHNOLOGY!AC        SYN["AC_MOS","ADVANCED_CMOS","A_CMOS"]        DSG["Advanced CMOS (AC)"]        PAR["VICC"]("5"),["VISS"]("0"),		["VOCC"]("5"),["VOSS"]("0"),		["VILmax"]("1.5"),["VIHmin"]("3.5"),		["VOLmax"](".44"),["VOHmin"]("4.44"),		["VOLmin"]("-.5"),["VOHmax"]("5.5"),		["VIT"]("2.5")	SIGBUS["FBMI"]("AC_040_S0_in.mac"),["FBMO"]("AC_040_S0_out.mac"),		["FBMT"]("AC_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("100e6"),["FWtyp"]("35e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("2.5"),["VImDF"]("2.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCLK["FBMI"]("AC_040_S0_in.mac"),["FBMO"]("AC_040_S0_out.mac"),		["FBMT"]("AC_025_S0_tri.mac"),		["FWmin"]("15e6"),["FWmax"]("100e6"),["FWtyp"]("40e6"),		["IOHmax"]("-.024"),["IOLmax"](".048"),		["VImDR"]("2.5"),["VImDF"]("2.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCTRL["FBMI"]("AC_000_S0_in.mac"),["FBMO"]("AC_040_S0_out.mac"),		["FBMT"]("AC_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("100e6"),["FWtyp"]("35e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("2.5"),["VImDF"]("2.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDATA["FBMI"]("AC_000_S0_in.mac"),["FBMO"]("AC_040_S0_out.mac"),		["FBMT"]("AC_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("100e6"),["FWtyp"]("35e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("2.5"),["VImDF"]("2.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDFT["SIGDFT"]("SIGUK")	SIGUK["FBMI"]("AC_000_S0_in.mac"),["FBMO"]("AC_040_S0_out.mac"),		["FBMT"]("AC_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("100e6"),["FWtyp"]("35e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("2.5"),["VImDF"]("2.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0");TECHNOLOGY!ACT        SYN["ACT_MOS","AC_TMOS"]        DSG["Advanced CMOS with TTL Inputs (ACT)"]        PAR["VICC"]("5"),["VISS"]("0"),		["VOCC"]("5"),["VOSS"]("0"),		["VILmax"]("0.8"),["VIHmin"]("2"),		["VOLmax"]("0.44"),["VOHmin"]("4.44"),		["VOLmin"]("-.5"),["VOHmax"]("7"),		["VIT"]("1.5")	SIGBUS["FBMI"]("ACT_040_S0_in.mac"),["FBMO"]("ACT_040_S0_out.mac"),		["FBMT"]("ACT_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("94e6"),["FWtyp"]("30e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCLK["FBMI"]("ACT_040_S0_in.mac"),["FBMO"]("ACT_040_S0_out.mac"),		["FBMT"]("ACT_025_S0_tri.mac"),		["FWmin"]("15e6"),["FWmax"]("100e6"),["FWtyp"]("35e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCTRL["FBMI"]("ACT_000_S0_in.mac"),["FBMO"]("ACT_040_S0_out.mac"),		["FBMT"]("ACT_025_S0_tri.mac"),		["FWmin"]("8e6"),["FWmax"]("83e6"),["FWtyp"]("25e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDATA["FBMI"]("ACT_000_S0_in.mac"),["FBMO"]("ACT_040_S0_out.mac"),		["FBMT"]("ACT_025_S0_tri.mac"),		["FWmin"]("8e6"),["FWmax"]("83e6"),["FWtyp"]("25e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGDFT["SIGDFT"]("SIGUK")	SIGUK["FBMI"]("ACT_040_S0_in.mac"),["FBMO"]("ACT_040_S0_out.mac"),		["FBMT"]("ACT_025_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("94e6"),["FWtyp"]("30e6"),		["IOHmax"]("-.024"),["IOLmax"](".024"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("2.5"),["VOmDF"]("2.5"),		["TTRmax"]("10E-9"),["TTFmax"]("10E-9"),		["TOmDR"]("0"),["TOmDF"]("0");TECHNOLOGY!AHC	SYN["AHC_MOS","AH_CMOS","ADVANCED_HIGH_SPEED_CMOS"]	DSG["Advanced High Speed CMOS (AHC)"]	PAR["VICC"]("3.3"),["VISS"]("0"),		["VOCC"]("3.3"),["VOSS"]("0"),		["VILmax"](".8"),["VIHmin"]("2"),		["VOLmax"](".44"),["VOHmin"]("2.4"),		["VOLmin"]("0"),["VOHmax"]("3.3"),		["VIT"]("1.5")	SIGBUS["FBMI"]("AHC_042_S0_in.mac"),["FBMO"]("AHC_042_S0_out.mac"),		["FBMT"]("AHC_027_S0_tri.mac"),		["FWmin"]("10e6"),["FWmax"]("75e6"),["FWtyp"]("25e6"),		["IOHmax"]("-.004"),["IOLmax"](".004"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.65"),["VOmDF"]("1.65"),		["TTRmax"]("20E-9"),["TTFmax"]("20E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCLK["FBMI"]("AHC_042_S0_in.mac"),["FBMO"]("AHC_042_S0_out.mac"),		["FBMT"]("AHC_027_S0_tri.mac"),		["FWmin"]("15e6"),["FWmax"]("80e6"),["FWtyp"]("30e6"),		["IOHmax"]("-.004"),["IOLmax"](".004"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.65"),["VOmDF"]("1.65"),		["TTRmax"]("20E-9"),["TTFmax"]("20E-9"),		["TOmDR"]("0"),["TOmDF"]("0")	SIGCTRL["FBMI"]("AHC_000_S0_in.mac"),["FBMO"]("AHC_042_S0_out.mac"),		["FBMT"]("AHC_027_S0_tri.mac"),		["FWmin"]("8e6"),["FWmax"]("60e6"),["FWtyp"]("15e6"),		["IOHmax"]("-.004"),["IOLmax"](".004"),		["VImDR"]("1.5"),["VImDF"]("1.5"),		["VOmDR"]("1.65"),["VOmDF"]("1.65"),		["TTRmax"]("20E-9"),["TTFmax"]("20E-9"),