.ALIASES
D_D1            D1(1=N8712282 2=INT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871446@DIODE.D1N5830.Normal(chips)
R_{Rlower}          {Rlower}(1=0 2=N871688 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871698@ANALOG.R.Normal(chips)
X_U5            U5(1=N871010 2=0 3=N8712282 4=0 ) CN @CHAPTER3_2.Flyback CM pole -
+1(sch_1):INS871212@SMPSRECIPES.XFMR1.Normal(chips)
R_R31           R31(1=N870986 2=N8709160 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS870988@ANALOG.R.Normal(chips)
R_Ropto          Ropto(1=N874846 2=CTRL ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS872205@ANALOG.R.Normal(chips)
R_Rload          Rload(1=0 2=VOUT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871246@ANALOG.R.Normal(chips)
R_Rupper          Rupper(1=N871688 2=VOUT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871732@ANALOG.R.Normal(chips)
R_R6            R6(1=0 2=DC ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871268@ANALOG.R.Normal(chips)
C_C5            C5(1=N871776 2=N871688 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871758@ANALOG.C.Normal(chips)
V_Vin           Vin(+=N871046 -=0 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871286@SOURCE.VDC.Normal(chips)
X_U13           U13(A=N871822 K=N871776 C=TL431 E=0 ) CN @CHAPTER3_2.Flyback CM pole -
+1(sch_1):INS871526@APPLICATION.opto.Normal(chips)
R_R29           R29(1=N871822 2=INT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871798@ANALOG.R.Normal(chips)
L_L2            L2(1=N8713300 2=VOUT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871320@ANALOG.L.Normal(chips)
R_R32           R32(1=INT 2=N8713300 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871340@ANALOG.R.Normal(chips)
C_C6            C6(1=0 2=TL431 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871588@ANALOG.C.Normal(chips)
X_U11           U11(A=N871046 C=N871076 P=N871010 VC=CTRL DC=DC ) CN @CHAPTER3_2.Flyback CM pole -
+1(sch_1):INS871106@VATCHE.PWMCM.Normal(chips)
R_R3            R3(1=N8713701 2=INT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871360@ANALOG.R.Normal(chips)
R_R30           R30(1=TL431 2=N871728 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871604@ANALOG.R.Normal(chips)
C_Copto          Copto(1=0 2=CTRL ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS872328@ANALOG.C.Normal(chips)
C_C2            C2(1=0 2=N8713701 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871382@ANALOG.C.Normal(chips)
L_LoL           LoL(1=N8709160 2=TL431 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS870906@ANALOG.L.Normal(chips)
R_R2            R2(1=N8711621 2=VOUT ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871152@ANALOG.R.Normal(chips)
V_Vbias          Vbias(+=N871728 -=0 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871638@SOURCE.VDC.Normal(chips)
E_GAIN1          GAIN1(OUT=N874846 IN=N870986 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871410@ABM.GAIN.Normal(chips)
C_CoL           CoL(1=N870980 2=N870986 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS870926@ANALOG.C.Normal(chips)
L_L1            L1(1=N871076 2=0 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871174@ANALOG.L.Normal(chips)
X_U12           U12(K=N871776 A=0 REF=N871688 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871660@APPLICATION.TL431.Normal(chips)
V_Vstim          Vstim(+=N870980 -=0 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS870942@SOURCE.VAC.Normal(chips)
C_C1            C1(1=0 2=N8711621 ) CN @CHAPTER3_2.Flyback CM pole - 1(sch_1):INS871196@ANALOG.C.Normal(chips)
_    _(int=INT)
_    _(TL431=TL431)
_    _(dc=DC)
_    _(ctrl=CTRL)
_    _(vout=VOUT)
.ENDALIASES