Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c....\01-繼電器控制試驗（節點2）.C(158): error C202: 'Relay_Flag': undefined identifier.\01-繼電器控制試驗（節點2）.C(170): error C202: 'Relay_Flag': undefined identifier.\01-繼電器控制試驗（節點2）.C(171): error C202: 'Relay_Flag': undefined identifierTarget not createdBuild target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c....\01-繼電器控制試驗（節點2）.C(158): error C202: 'Relay_Flag': undefined identifier.\01-繼電器控制試驗（節點2）.C(170): error C202: 'Relay_Flag': undefined identifier.\01-繼電器控制試驗（節點2）.C(171): error C202: 'Relay_Flag': undefined identifierTarget not createdBuild target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE10H    TO:      FE10H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE11H    TO:      FE11H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE12H    TO:      FE12H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE13H    TO:      FE13H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE14H    TO:      FE14H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE15H    TO:      FE15H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE16H    TO:      FE16H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE17H    TO:      FE17H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE18H    TO:      FE18H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE19H    TO:      FE19H*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1AH    TO:      FE1AH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1BH    TO:      FE1BH*** WARNING L6: XDATA SPACE MEMORY OVERLAP    FROM:    FE1CH    TO:      FE1CHcreating hex file from "01-繼電器控制試驗（節點2）"..."01-繼電器控制試驗（節點2）" - 0 Error(s), 21 Warning(s).Build target 'Target 1'compiling 01-繼電器控制試驗（節點2）.c...linking...*** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS    SEGMENT: ?PR?CHECK_RELAY?01____鏮鱛______椋__赺