JDF B
// Created by Version 8.0 
PROJECT nand_flash_cntl
DESIGN nand_flash_cntl Normal
DEVKIT LCMXO2280C-5T100C
ENTRY Mixed Verilog/VHDL
TESTFIXTURE ..\..\..\testbench\vhdl\nfcm_tb.vhd
TESTDEPFILE ../../../testbench/vhdl/nfcm_tb.vhd ../../../testbench/vhdl/flash_interface.vhd
MODULE ..\..\..\source\vhdl\ErrLoc.vhd
MODSTYLE ErrLoc Normal
MODULE ..\..\..\source\vhdl\H_gen.vhd
MODSTYLE H_gen Normal
MODULE ..\..\..\source\vhdl\MFSM.vhd
MODSTYLE MFSM Normal
MODULE ..\..\..\source\vhdl\TFSM.vhd
MODSTYLE TFSM Normal
MODULE ..\..\..\source\vhdl\ACounter.vhd
MODSTYLE ACounter Normal
MODULE ..\..\..\source\vhdl\ipexpress\xo\ebr_buffer.vhd
MODSTYLE ebr_buffer Normal
MODULE ..\..\..\source\vhdl\nfcm_top.vhd
MODSTYLE nfcm_top Normal
SYNTHESIS_TOOL Synplify
SIMULATOR_TOOL ActiveHDL
AUTO_READ_DESIGN TRUE
TOPMODULE nfcm_top