以AVR單片機(jī)ATmega8和USB接口器件PDIUSBD12為核心，基于標(biāo)準(zhǔn)的USB1.1協(xié)議，設(shè)計(jì)一種通用USB接口模塊，以滿足嵌入式系統(tǒng)中對(duì)USB接口的需求。對(duì)模塊的硬件電路或單片機(jī)固件程序的硬件接口層稍加修改即可用于其他各種微處理器。該模塊可為各種嵌入式系統(tǒng)增加USB接口,實(shí)現(xiàn)與USB主機(jī)系統(tǒng)通信。 Abstract: Based on AVR microcontroller ATmega8 and USB interface chip PDIUSBD12, a general USB interface module is designed according to USB1.1 protocol for various requirements of embedded systems. Only with few modifications in circuit or hardware abstract layer of firmware, the module can be used on many types of microprocessors. All kinds of embedded systems can realize high speed and stable communication with USB host systems, owing to the facility of this module.
標(biāo)簽： AVR USB 單片機(jī) 接口設(shè)計(jì)
上傳時(shí)間： 2014-01-08
上傳用戶：趙云興
The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dotmatrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has40 outputs, of which 24 are programmable and configurable for the following ratios ofrows/columns: 32¤8, 24¤16, 16¤24 or 8¤32. The PCF8578 can function as a stand-alone LCDcontroller and driver for use in small systems. For larger systems it can be used inconjunction with up to 32 PCF8579s for which it has been optimized. Together these twodevices form a general purpose LCD dot matrix driver chip set, capable of driving displaysof up to 40960 dots. The PCF8578 is compatible with most microcontrollers andcommunicates via a two-line bidirectional bus (I2C-bus). Communication overhead isminimized by a display RAM with auto-incremented addressing and display bankswitching.
標(biāo)簽： 8578 PCF LCD 圖形點(diǎn)陣
上傳時(shí)間： 2013-10-23
上傳用戶：頂?shù)弥?/p>
將現(xiàn)行的供暖計(jì)費(fèi)方式由按建筑面積計(jì)費(fèi)變?yōu)榘聪牡臒崮苡?jì)費(fèi)是供暖計(jì)費(fèi)方式發(fā)展趨勢(shì)，為了滿足這一計(jì)費(fèi)方式變化的需要，設(shè)計(jì)了基于IC卡的預(yù)付費(fèi)式新型供暖計(jì)費(fèi)系統(tǒng)，通過測(cè)量用戶采暖系統(tǒng)進(jìn)出口的溫度和流量，計(jì)算用戶消耗的熱能，利用IC卡記錄用戶預(yù)付費(fèi)的金額和當(dāng)年熱能的單價(jià)，根據(jù)熱能消耗和當(dāng)年熱能的單價(jià)計(jì)算用戶采暖費(fèi)，根據(jù)實(shí)際發(fā)生的供暖費(fèi)用和預(yù)付費(fèi)金額控制供暖的開停，這一計(jì)費(fèi)方式的變化使供暖計(jì)費(fèi)更趨合理。 Abstract: It is trend that the mode of heat charging is changed from billing by building area to by thermal energy. In order to meet the needs of heat charging mode changing， a new system of heat charging based on IC card is proposed. The user?蒺s energy consumption is calculated by measuring the user inlet and outlet temperature and flow，using the IC card to record the prepaid amount and the current price of heat. The user?蒺s heating costs is calculated according to energy consumption and current price， according to actual heating costs and prepaid amount，the system controls the heating opening or stopping. It is more reasonable that calculated heating costs by user heat consumption
標(biāo)簽： IC卡 計(jì)費(fèi) 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-10-14
上傳用戶：大融融rr
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上傳時(shí)間： 2013-11-15
上傳用戶：zouxinwang
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標(biāo)簽： Spartan-DSP Virtex FPGAs Ap
上傳時(shí)間： 2013-10-23
上傳用戶：raron1989
This application report discusses the design of non-invasive optical plethysmographyalso called as pulsoximeter using the MSP430FG437 Microcontroller (MCU). Thepulsoximeter consists of a peripheral probe combined with the MCU displaying theoxygen saturation and pulse rate on a LCD glass. The same sensor is used for bothheart-rate detection and pulsoximetering in this application. The probe is placed on aperipheral point of the body such as a finger tip, ear lobe or the nose. The probeincludes two light emitting diodes (LEDs), one in the visible red spectrum (660nm) andthe other in the infrared spectrum (940nm). The percentage of oxygen in the body isworked by measuring the intensity from each frequency of light after it transmitsthrough the body and then calculating the ratio between these two intensities.
標(biāo)簽： Pulsoximeter Single-Chip Des
上傳時(shí)間： 2013-10-27
上傳用戶：黑漆漆
This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC). As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.
標(biāo)簽： Decoding DTMF with PIC
上傳時(shí)間： 2013-11-21
上傳用戶：zhaoke2005
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
標(biāo)簽： master C-bus 9541 PCA
上傳時(shí)間： 2013-10-09
上傳用戶：3294322651
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標(biāo)簽： MULTICHANNEL 5.5 TO RS
上傳時(shí)間： 2013-10-19
上傳用戶：ddddddd
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
標(biāo)簽： Infra-red Remote Cont 05K
上傳時(shí)間： 2014-01-24
上傳用戶：zl5712176
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