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  • LPC1700系列芯片勘誤手冊(cè)

    This errata sheet describes Both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.

    標(biāo)簽: 1700 LPC 系列芯片 勘誤

    上傳時(shí)間: 2013-11-22

    上傳用戶:liangliang123

  • LPC1100系列微控制器勘誤手冊(cè)

    This errata sheet describes Both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.

    標(biāo)簽: 1100 LPC 微控制器 勘誤

    上傳時(shí)間: 2014-12-31

    上傳用戶:thuyenvinh

  • MAX338/MAX339的英文數(shù)據(jù)手冊(cè)

      本軟件是關(guān)于MAX338, MAX339的英文數(shù)據(jù)手冊(cè):MAX338, MAX339   8通道/雙4通道、低泄漏、CMOS模擬多路復(fù)用器   The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in Both directions.   These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.

    標(biāo)簽: MAX 338 339 英文

    上傳時(shí)間: 2013-11-12

    上傳用戶:18711024007

  • 數(shù)字邏輯與微處理器VHDL設(shè)計(jì)

    This book is about the digital logic design of microprocessors. It is intended to provide Both an understanding of the basic principles of digital logic design, and how these fundamental principles are applied in the building of complex microprocessor circuits using current technologies.

    標(biāo)簽: VHDL 數(shù)字邏輯 微處理器

    上傳時(shí)間: 2013-10-14

    上傳用戶:leyesome

  • 遠(yuǎn)程配置Nios II處理器應(yīng)用筆記

         通過(guò)以太網(wǎng)遠(yuǎn)程配置Nios II 處理器 應(yīng)用筆記 Firmware in embedded hardware systems is frequently updated over the Ethernet. For embedded systems that comprise a discrete microprocessor and the devices it controls, the firmware is the software image run by the microprocessor. When the embedded system includes an FPGA, firmware updates include updates of the hardware image on the FPGA. If the FPGA includes a Nios® II soft processor, you can upgrade Both the Nios II processor—as part of the FPGA image—and the software that the Nios II processor runs, in a single remote configuration session.

    標(biāo)簽: Nios 遠(yuǎn)程 處理器 應(yīng)用筆記

    上傳時(shí)間: 2013-11-22

    上傳用戶:chaisz

  • PCB抄板密技

    第一步,拿到一塊PCB,首先在紙上記錄好所有元?dú)饧男吞?hào),參數(shù),以及位置,尤其是二極管,三極管的方向,IC缺口的方向。最好用數(shù)碼相機(jī)拍兩張?jiān)獨(dú)饧恢玫恼掌? 第二步,拆掉所有器件,并且將PAD孔里的錫去掉。用酒精將PCB清洗干凈,然后放入掃描儀內(nèi),啟動(dòng)POHTOSHOP,用彩色方式將絲印面掃入,并打印出來(lái)備用。 第三步,用水紗紙將TOP LAYER 和BOTTOM LAYER兩層輕微打磨,打磨到銅膜發(fā)亮,放入掃描儀,啟動(dòng)PHOTOSHOP,用彩色方式將兩層分別掃入。注意,PCB在掃描儀內(nèi)擺放一定要橫平樹(shù)直,否則掃描的圖象就無(wú)法使用,掃描儀分辨率請(qǐng)選為600。 需要的朋友請(qǐng)下載哦!

    標(biāo)簽: PCB 抄板

    上傳時(shí)間: 2014-03-04

    上傳用戶:tianming222

  • wp379 AXI4即插即用IP

    In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom Both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.

    標(biāo)簽: AXI4 379 wp 即插即用

    上傳時(shí)間: 2013-11-11

    上傳用戶:csgcd001

  • XAPP144 -設(shè)計(jì)CPLD多電壓系統(tǒng)

    Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—Both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for handling the multi-voltage interfacing, but do require forethought to ensure correctoperation.

    標(biāo)簽: XAPP CPLD 144 電壓

    上傳時(shí)間: 2013-11-10

    上傳用戶:yy_cn

  • WP151 - Xilinx FPGA的System ACE配置解決方案

    Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered Both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.

    標(biāo)簽: System Xilinx FPGA 151

    上傳時(shí)間: 2013-11-23

    上傳用戶:kangqiaoyibie

  • XAPP390 - 利用CoolRunner-II CPLD設(shè)計(jì)數(shù)碼相機(jī)

      Digital cameras have become increasingly popular over the last few years. Digital imagingtechnology has grown to new markets including cellular phones and PDA devices. With thediverse marketplace, a variety of imaging technology must be available. Imaging technologyhas expanded to include Both charge-coupled device (CCD) and CMOS image sensors.

    標(biāo)簽: CoolRunner-II XAPP CPLD 390

    上傳時(shí)間: 2013-10-16

    上傳用戶:18710733152

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