The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
標(biāo)簽： master C-bus 9541 PCA
上傳時(shí)間： 2013-10-09
上傳用戶：3294322651
The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
標(biāo)簽： High-speed transce 1042 TJA
上傳時(shí)間： 2014-12-28
上傳用戶：氣溫達(dá)上千萬(wàn)的
The TJA1051 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
標(biāo)簽： High-speed transce 1051 TJA
上傳時(shí)間： 2013-10-17
上傳用戶：jisujeke
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標(biāo)簽： MULTICHANNEL 5.5 TO RS
上傳時(shí)間： 2013-10-19
上傳用戶：ddddddd
The Philips family of Multiplexers and Switches consists of bi-directional translating switches controlled via the I2C or SMBus to fan out an upstream SCL/SDA pair to 2, 4 or 8 downstream channels of SCx/SDx pairs. The Multiplexers allow only one downstream channel to be selected at a time, while the Switches allow any individual downstream channel or combination of downstream channels to be selected, depending on the content of the programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels, and devices on the active downstream channels to communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. Combined interrupt output and hardware reset input are device options that are featured.
上傳時(shí)間： 2013-10-11
上傳用戶：dianxin61
基于單片機(jī)的步進(jìn)電機(jī)開(kāi)環(huán)控制系統(tǒng):通過(guò)ATMEL89C51單片機(jī)對(duì)步進(jìn)電機(jī)進(jìn)行控制,主要介紹了步進(jìn)電機(jī)控制器、驅(qū)動(dòng)電路和LED顯示電路的設(shè)計(jì),實(shí)現(xiàn)了步進(jìn)電機(jī)的開(kāi)環(huán)控制。在步進(jìn)電機(jī)控制器的設(shè)計(jì)中,重點(diǎn)闡述了脈沖產(chǎn)生電路以及對(duì)速度的控制。該系統(tǒng)具有成本低、控制方便的特點(diǎn)。關(guān)鍵詞: 單片機(jī); 步進(jìn)電機(jī); 開(kāi)環(huán)控制 Abstract: The design using ATMEL89C51 single chip to control the step2motor with its controller, driving circuit and LED disp lay circuit to realize step motor open2loop controlwere introduced. For the controller in this design,the circuit to p roduce pulse and the speed controlwere expatiated emphatically. This system possesses features of lower cost, easier control.Key words: single ch ip; step2motor; open2loop con trol
標(biāo)簽： 單片機(jī) 步進(jìn)電機(jī) 開(kāi)環(huán) 控制系統(tǒng)
上傳時(shí)間： 2013-10-13
上傳用戶：cicizoe
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標(biāo)簽： Signal Input Fall Rise
上傳時(shí)間： 2013-10-23
上傳用戶：copu
Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.
標(biāo)簽： iButtons Reading Writing and
上傳時(shí)間： 2013-10-29
上傳用戶：long14578
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
標(biāo)簽： Infra-red Remote Cont 05K
上傳時(shí)間： 2014-01-24
上傳用戶：zl5712176
基于USB接口的數(shù)據(jù)采集模塊的設(shè)計(jì)與實(shí)現(xiàn)Design and Implementation of USB-Based Data Acquisition Module路 永 伸(天津科技大學(xué)電子信息與自動(dòng)化學(xué)院，天津300222)摘要文中給出基于USB接口的數(shù)據(jù)采集模塊的設(shè)計(jì)與實(shí)現(xiàn)。硬件設(shè)計(jì)采用以Adpc831與PDIUSBDI2為主的器件進(jìn)行硬件設(shè)計(jì)，采用Windriver開(kāi)發(fā)USB驅(qū)動(dòng)，并用Visual C十十6.0對(duì)主機(jī)軟件中硬件接口操作部分進(jìn)行動(dòng)態(tài)鏈接庫(kù)封裝。關(guān)鍵詞USB 數(shù)據(jù)采集Adpc831 PDNSBDI2 Windriver動(dòng)態(tài)鏈接庫(kù)Abstract T hed esigna ndim plementaitono fU SB-BasedD ataA cquisiitonM oduleis g iven.Th ec hips oluitonm ainlyw ithA dpc831a ndP DTUSBD12i sused for hardware design. The USB drive is developed場(chǎng)Wmdriver, and the operation on the hardware interface is packaged into Dynamic Link Libraries場(chǎng)Visual C++6.0. Keywords USB DataA cquisition Adttc831 PDfUSBD12 Windriver0 引言US B總 線 是新一代接口總線，最初推出的目的是為了統(tǒng)一取代PC機(jī)的各類外設(shè)接口，迄今經(jīng)歷了1.0,1.1與2.0版本3個(gè)標(biāo)準(zhǔn)。在國(guó)內(nèi)基于USB總線的相關(guān)設(shè)計(jì)與開(kāi)發(fā)也得到了快速的發(fā)展，很多設(shè)計(jì)者從各自的應(yīng)用領(lǐng)域，用不同方案設(shè)計(jì)出了相應(yīng)的裝置[1,2]。數(shù)據(jù)采集是工業(yè)控制中一個(gè)普遍而重要的環(huán)節(jié)，因此開(kāi)發(fā)基于USB接口的數(shù)據(jù)采集模塊具有很強(qiáng)的現(xiàn)實(shí)應(yīng)用意義。雖然 US B總線標(biāo)準(zhǔn)已經(jīng)發(fā)展到2.0版本，但由于工業(yè)控制現(xiàn)場(chǎng)干擾信號(hào)的情況比較復(fù)雜，高速數(shù)據(jù)傳輸?shù)目煽啃圆蝗菀妆槐ＷC，并且很多場(chǎng)合對(duì)數(shù)據(jù)采集的實(shí)時(shí)性要求并不高，開(kāi)發(fā)2.0標(biāo)準(zhǔn)產(chǎn)品的成本又較1.1標(biāo)準(zhǔn)產(chǎn)品高，所以筆者認(rèn)為，在工業(yè)控制領(lǐng)域，目前開(kāi)發(fā)基于USB總線1.1標(biāo)準(zhǔn)實(shí)現(xiàn)的數(shù)據(jù)采集模塊的實(shí)用意義大于相應(yīng)2.0標(biāo)準(zhǔn)模塊。
標(biāo)簽： USB 接口 數(shù)據(jù)采集模塊
上傳時(shí)間： 2013-10-23
上傳用戶：q3290766
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