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Express-to-Generic

Interface 8051 to Coolrunner CPLD(Xilinx App)

Interface 8051 to Coolrunner CPLD(Xilinx App)

標簽： Coolrunner Interface Xilinx 8051

上傳時間： 2013-09-05

上傳用戶：bcjtao
power pcb To protel 軟件

power pcb To protel 軟件

標簽： protel power pcb To

上傳時間： 2013-09-11

上傳用戶：sunshine1402
Can convert data file(txt format)to CAD(scr)file,and draw curve!

Can convert data file(txt format)to CAD(scr)file,and draw curve!

標簽： file convert format curve

上傳時間： 2013-09-11

上傳用戶：天空說我在
gerber-to-protel is a pdf file

gerber-to-protel is a pdf file ,which is used for convert bmp to pcb.

標簽： gerber-to-protel file is

上傳時間： 2013-09-18

上傳用戶：liuxinyu2016
5 Gsps高速數(shù)據采集系統(tǒng)的設計與實現(xiàn)

以某高速實時頻譜儀為應用背景，論述了5 Gsps采樣率的高速數(shù)據采集系統(tǒng)的構成和設計要點，著重分析了采集系統(tǒng)的關鍵部分高速ADC（analog to digital，模數(shù)轉換器）的設計、系統(tǒng)采樣時鐘設計、模數(shù)混合信號完整性設計、電磁兼容性設計和基于總線和接口標準（PCI Express）的數(shù)據傳輸和處理軟件設計。在實現(xiàn)了系統(tǒng)硬件的基礎上，采用Xilinx公司ISE軟件的在線邏輯分析儀（ChipScope Pro）測試了ADC和采樣時鐘的性能，實測表明整體指標達到設計要求。給出上位機對采集數(shù)據進行處理的結果，表明系統(tǒng)實現(xiàn)了數(shù)據的實時采集存儲功能。

標簽： Gsps 高速數(shù)據采集系統(tǒng)

上傳時間： 2014-11-26

上傳用戶：黃蛋的蛋黃
PCI ExpressTM Architecture

PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

標簽： Architecture ExpressTM PCI

上傳時間： 2013-11-03

上傳用戶：gy592333
pci e PCB設計規(guī)范

This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.

標簽： pci PCB 設計規(guī)范

上傳時間： 2013-10-15

上傳用戶：busterman
R7732_3_5 AC TO DC PWM Control chip

R7732_7733_7735是Richpower公司推出的高效AC TO DC 電源PWM控制芯片,最大功率可以做到75W;如有需求請聯(lián)系我電話：021-54262182EXT 114 (Eric) QQ ：1187337351

標簽： Control 7732 chip PWM

上傳時間： 2013-11-20

上傳用戶：xz85592677
長電c2383 TO-92L

長電c2383 TO-92L

標簽： c2383 TO 92

上傳時間： 2013-11-09

上傳用戶：wvbxj
PCI Express電源解決方案

PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.

標簽： Express PCI 電源解決方案

上傳時間： 2013-11-17

上傳用戶：squershop