This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the
This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the...
FIFOs技術(shù)資料
?? 資源總數(shù)：6
?? 源代碼：196
?? 電路圖：1
?? FIFOs全部資料 (6個)
XAPP807-封裝最小的三態(tài)以太網(wǎng)MAC處理引擎
The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded networ...
The first task at hand is to set up the endpoints appropriately for this example. The following code
The first task at hand is to set up the endpoints appropriately for this example. The following code...
Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.
Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs....
這個設(shè)計(jì)是使用Virtex-4實(shí)現(xiàn)DDR的控制器的
這個設(shè)計(jì)是使用Virtex-4實(shí)現(xiàn)DDR的控制器的，設(shè)計(jì)分為三個主要模塊：Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR S...
A badic controller for the UART. It incorporates a -- transmit and receive FIFO (fr
A badic controller for the UART. It incorporates a -- transmit and receive FIFO (fr...