Abstract: How can an interface change a happy face to a sad face? Engineers have happy faces when an interface works properly.Sad faces indicate failure somewhere. Because interfaces between microprocessors and ICS are simple—even easy—they are oftenignored until interface failure causes sad faces all around. In this article, we discuss a common SPI error that can be almostimpossible to find in a large system. Links to interface tutorial information are provided for complete information. Noise as a systemissue and ICS to minimize its effects are also described.
上傳時(shí)間： 2013-11-18
上傳用戶：zgz317
深入理解計(jì)算機(jī)系統(tǒng)（computer system：a programmer s perpective)是一本非常經(jīng)典的教材，國內(nèi)外很多大學(xué)都采用此教材講授ICS課程（introduction to computer system) 本代碼是該書配套的一個(gè)實(shí)驗(yàn)的實(shí)現(xiàn)，（代碼優(yōu)化，圖形學(xué)相關(guān)）得了滿分哦！
標(biāo)簽： programmer perpective computer system
上傳時(shí)間： 2014-01-15
上傳用戶：FreeSky
目前在單片機(jī)的教學(xué)過程中，Labcenter ElectronICS 推出的 EDA 軟件 Proteus（普羅特斯）已越來越 受到重視，并被提倡應(yīng)用于單片機(jī)數(shù)字實(shí)驗(yàn)室的構(gòu)建之中。Proteus 是一款功能較為全面的電子設(shè)計(jì)自動(dòng) 化軟件，它不但可用于 PCB 設(shè)計(jì)以及模擬和數(shù)字電路仿真分析，還可應(yīng)用于單片機(jī)及其外圍電路的仿 真，支持的微處理器芯片（Microprocessors ICS）包括 8051 系列、AVR 系列、PIC 系列、HC11 系列、 ARM7/LPC2000 系列甚至 Z80 等。本文對 Proteus 在單片機(jī)應(yīng)用系統(tǒng)中的仿真應(yīng)用作一介紹。
上傳時(shí)間： 2015-12-29
上傳用戶：海陸空653
The Ralink 802.11n Chipset family provides solutions for PCI, PCIe and USB interfaces with both 2.4 and 2.4/5GHz suppport. Each chipset consists of two highly integrated ICS (RFIC and BB/MAC IC) that fully comply with current draft IEEE 802.11n and IEEE 802.11a/b/g standards.
標(biāo)簽： interfaces solutions provides Chipset
上傳時(shí)間： 2014-01-13
上傳用戶：Thuan
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICS. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標(biāo)簽： bus bidirectional primarily designed
上傳時(shí)間： 2013-12-11
上傳用戶：jeffery
JAVA編寫的，用于讀寫iCalendar[*.ICS]的類庫
上傳時(shí)間： 2014-01-12
上傳用戶：李夢晗
MC9S08QE128單片機(jī)的例程，包含I2c SPI,ADC,SCI,ICS 等等。。。。。。
標(biāo)簽： MC9S08QE128
上傳時(shí)間： 2015-03-19
上傳用戶：godfather
A major societal challenge for the decades to come will be the delivery of effective medical services while at the same time curbing the growing cost of healthcare. It is expected that new concepts-particularly electronically assisted healthcare will provide an answer. This will include new devices, new medical services as well as networking. On the device side, impressive innovation has been made possible by micro- and nanoelectronICS or CMOS Integrated Circuits. Even higher accuracy and smaller form factor combined with reduced cost and increased convenience of use are enabled by incorporation of CMOS IC design in the realization of biomedical systems. The compact hearing aid devices and current pacemakers are good examples of how CMOS ICS bring about these new functionalities and services in the medical field. Apart from these existing applications, many researchers are trying to develop new bio-medical solutions such as Artificial Retina, Deep Brain Stimulation, and Wearable Healthcare Systems. These are possible by combining the recent advances of bio-medical technology with low power CMOS IC technology.
上傳時(shí)間： 2017-02-06
上傳用戶：linyj
在互補(bǔ)式金氧半(CMOS)積體電路中，隨著量產(chǎn)製程的演進(jìn)，元件的尺寸已縮減到深次微 米(deep-submicron)階段，以增進(jìn)積體電路(IC)的性能及運(yùn)算速度，以及降低每顆晶片的製造 成本。但隨著元件尺寸的縮減，卻出現(xiàn)一些可靠度的問題。 在次微米技術(shù)中，為了克服所謂熱載子(Hot-Carrier)問題而發(fā)展出 LDD(Lightly-Doped Drain) 製程與結(jié)構(gòu); 為了降低 CMOS 元件汲極(drain)與源極(source)的寄生電阻(sheet resistance) Rs 與 Rd，而發(fā)展出 Silicide 製程; 為了降低 CMOS 元件閘級的寄生電阻 Rg，而發(fā)展出 Polycide 製 程 ; 在更進(jìn)步的製程中把 Silicide 與 Polycide 一起製造，而發(fā)展出所謂 Salicide 製程
標(biāo)簽： Protection CMOS ESD ICS in
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
This paper reviews key factors to practical ESD protection design for RF and analog/mixed-signal (AMS) ICS, including general challenges emerging, ESD-RFIC interactions, RF ESD design optimization and prediction, RF ESD design characterization, ESD-RFIC co-design technique, etc. Practical design examples are discussed. It means to provide a systematic and practical design flow for whole-chip ESD protection design optimization and prediction for RF/AMS ICS to ensure 1 st Si design success.
標(biāo)簽： ESD_protection_for_RF_and_AMS_ICS
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
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