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Low-LEVEL

  • 用于信號調(diào)理的微電路

      Low power operation of electronic apparatus has becomeincreasingly desirable. Medical, remote data acquisition,power monitoring and other applications are good candidatesfor battery driven, low power operation. Micropoweranalog circuits for transducer-based signal conditioningpresent a special class of problems. Although micropowerICs are available, the interconnection of these devices toform a functioning micropower circuit requires care. (SeeBox Sections, “Some Guidelines for Micropower Designand an Example” and “Parasitic Effects of Test Equipmenton Micropower Circuits.”) In particular, trade-offs betweensignal levels and power dissipation become painful whenperformance in the 10-bit to 12-bit area is desirable.

    標(biāo)簽: 信號調(diào)理 微電路

    上傳時間: 2013-10-22

    上傳用戶:rocketrevenge

  • ADC轉(zhuǎn)換器技術(shù)用語 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    標(biāo)簽: Converter Defi ADC 轉(zhuǎn)換器

    上傳時間: 2013-11-12

    上傳用戶:pans0ul

  • 高速數(shù)字系統(tǒng)設(shè)計下載pdf

    高速數(shù)字系統(tǒng)設(shè)計下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標(biāo)簽: 高速數(shù)字 系統(tǒng)設(shè)計

    上傳時間: 2013-10-26

    上傳用戶:縹緲

  • PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

    Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.

    標(biāo)簽: Considerations Guidelines and Design

    上傳時間: 2013-10-14

    上傳用戶:ysystc699

  • 數(shù)字與模擬電路設(shè)計技巧

    數(shù)字與模擬電路設(shè)計技巧IC與LSI的功能大幅提升使得高壓電路與電力電路除外,幾乎所有的電路都是由半導(dǎo)體組件所構(gòu)成,雖然半導(dǎo)體組件高速、高頻化時會有EMI的困擾,不過為了充分發(fā)揮半導(dǎo)體組件應(yīng)有的性能,電路板設(shè)計與封裝技術(shù)仍具有決定性的影響。 模擬與數(shù)字技術(shù)的融合由于IC與LSI半導(dǎo)體本身的高速化,同時為了使機(jī)器達(dá)到正常動作的目的,因此技術(shù)上的跨越競爭越來越激烈。雖然構(gòu)成系統(tǒng)的電路未必有clock設(shè)計,但是毫無疑問的是系統(tǒng)的可靠度是建立在電子組件的選用、封裝技術(shù)、電路設(shè)計與成本,以及如何防止噪訊的產(chǎn)生與噪訊外漏等綜合考慮。機(jī)器小型化、高速化、多功能化使得低頻/高頻、大功率信號/小功率信號、高輸出阻抗/低輸出阻抗、大電流/小電流、模擬/數(shù)字電路,經(jīng)常出現(xiàn)在同一個高封裝密度電路板,設(shè)計者身處如此的環(huán)境必需面對前所未有的設(shè)計思維挑戰(zhàn),例如高穩(wěn)定性電路與吵雜(noisy)性電路為鄰時,如果未將噪訊入侵高穩(wěn)定性電路的對策視為設(shè)計重點,事后反復(fù)的設(shè)計變更往往成為無解的夢魘。模擬電路與高速數(shù)字電路混合設(shè)計也是如此,假設(shè)微小模擬信號增幅后再將full scale 5V的模擬信號,利用10bit A/D轉(zhuǎn)換器轉(zhuǎn)換成數(shù)字信號,由于分割幅寬祇有4.9mV,因此要正確讀取該電壓level并非易事,結(jié)果造成10bit以上的A/D轉(zhuǎn)換器面臨無法順利運作的窘境。另一典型實例是使用示波器量測某數(shù)字電路基板兩點相隔10cm的ground電位,理論上ground電位應(yīng)該是零,然而實際上卻可觀測到4.9mV數(shù)倍甚至數(shù)十倍的脈沖噪訊(pulse noise),如果該電位差是由模擬與數(shù)字混合電路的grand所造成的話,要測得4.9 mV的信號根本是不可能的事情,也就是說為了使模擬與數(shù)字混合電路順利動作,必需在封裝與電路設(shè)計有相對的對策,尤其是數(shù)字電路switching時,ground vance noise不會入侵analogue ground的防護(hù)對策,同時還需充分檢討各電路產(chǎn)生的電流回路(route)與電流大小,依此結(jié)果排除各種可能的干擾因素。以上介紹的實例都是設(shè)計模擬與數(shù)字混合電路時經(jīng)常遇到的瓶頸,如果是設(shè)計12bit以上A/D轉(zhuǎn)換器時,它的困難度會更加復(fù)雜。

    標(biāo)簽: 數(shù)字 模擬電路 設(shè)計技巧

    上傳時間: 2013-11-16

    上傳用戶:731140412

  • MR16 LED驅(qū)動MR16 LED燈與電子變壓器兼容

    Abstract: There are differences between the operation of low-frequency AC transformers and electronic transformersthat supply current to MR16 lamps, and there are also differences in the current draw for MR16 halogen lamps andMR16 LED lamps. These contrasts typically prevent an MR16 LED lamp from operating with most electronictransformers. This article explains how a high-brightness (HB) LED driver optimized for MR16 lamps will allow LEDlamps to be compatible with most electronic transformers.A similar version of this article appeared on Display Plus, July 7, 2012 and in German in Elektronikpraxis, October 1,2012.

    標(biāo)簽: LED MR 16 驅(qū)動

    上傳時間: 2013-10-14

    上傳用戶:playboys0

  • LED的電源管理

    A light-emitting diode (LED) is a semiconductor device that emits narrow-spectrum incoherent light when forward-biased.The color of the emitted light depends on the chemical composition of the semiconductor material used, and can benear-ultraviolet, visible or infrared. LEDs are more prevalent today than ever before, replacing traditional incandescent andfluorescent bulbs in many lighting applications. Incandescents use a heated filament, are subject to breakage and burnoutand operate at a luminous efficiency of 2% to 4%. Fluorescents are more efficient, at 7% to 12%, but require highdrive voltage and contain mercury, a toxic substance that may be eventually banned in certain countries. LEDs, however,produce light directly through electroluminescence, operate at low voltage and can deliver over 20% luminous efficiency.

    標(biāo)簽: LED 電源管理

    上傳時間: 2013-11-07

    上傳用戶:xiaoyuer

  • 電源工程師-電路設(shè)計中的英雄

    Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting devices and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.

    標(biāo)簽: 電源工程師 電路設(shè)計

    上傳時間: 2013-11-18

    上傳用戶:zhouxuepeng1

  • Lakewood (MAXREFDES7#)3.3V Input, ±12V (±15V) Output Isolated Power Supply

    Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and hardware files are included.

    標(biāo)簽: MAXREFDES Lakewood Isolated Output

    上傳時間: 2013-11-02

    上傳用戶:fengzimili

  • Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

    Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are included.

    標(biāo)簽: Riverside MAXREFDES Isolated Output

    上傳時間: 2013-11-16

    上傳用戶:會稽劍客

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