it s low density parity check coding file
標(biāo)簽： density coding parity check
上傳時(shí)間： 2014-01-02
上傳用戶：杜瑩12345
RF CMOS Low-Phase-Noise LC Oscillator Through Memory Reduction Tail Transistor
標(biāo)簽： Low-Phase-Noise Oscillator Transistor Reduction
上傳時(shí)間： 2017-07-21
上傳用戶：66666
Low-Power Real-Time Clock
標(biāo)簽： Low-Power Real-Time Clock
上傳時(shí)間： 2017-08-21
上傳用戶：skfreeman
Low-Power Real-Time Clock manual
標(biāo)簽： Low-Power Real-Time manual Clock
上傳時(shí)間： 2017-08-21
上傳用戶：LouieWu
cost存放了一個(gè)強(qiáng)連通圖的邊權(quán)矩陣，作為一個(gè)實(shí)例。 可在workspace中加載 運(yùn)用此算法要注意多次試驗(yàn)。
上傳時(shí)間： 2013-12-14
上傳用戶：lepoke
The Schumann resonance frequencies are a set of eigenmodes in the extremely low frequency (ELF) portion of the electromagnetic field spectrum. These frequencies are only present for planetary-like bodies with a substantial ionosphere acting as a perfect electric conductor, thus forming a resonance cavity with the surface. In this example, the Schumann resonance frequencies for the Earth are calculated.
標(biāo)簽： frequencies eigenmodes resonance extremely
上傳時(shí)間： 2014-12-09
上傳用戶：stella2015
Image enhancement in frequency domain using Fourier center frequency, Gaussian lowpass filter, Low pass filter, high pass filter. Image restoration using medean filter, weiner filter with noise generator such as Gaussian noise, Salt and Pepper noise
標(biāo)簽： frequency enhancement Gaussian Fourier
上傳時(shí)間： 2017-08-24
上傳用戶：xinzhch
zigbee協(xié)議棧中MAC層中LOW-LEVEL的部分源代碼，實(shí)現(xiàn)數(shù)據(jù)部分的通信功能，也給出了其相關(guān)定義
標(biāo)簽： LOW-LEVEL zigbee MAC 協(xié)議棧
上傳時(shí)間： 2017-08-24
上傳用戶：agent
X-MAC, a low power MAC protocol for wireless sensor networks (WSNs). Standard MAC protocols developed for duty-cycled WSNs such as BMAC, which is the default MAC protocol for TinyOS, employ an extended preamble and preamble sampling.
標(biāo)簽： MAC protocols Standard networks
上傳時(shí)間： 2014-01-13
上傳用戶：王楚楚
This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標(biāo)簽： This microprocessor describes S3C2410X
上傳時(shí)間： 2014-01-11
上傳用戶：shizhanincc
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