ImpulseC Codeveloper fft code. This file implements the hardware portion of a 256 sample FFT using a radix-4 algorithm. This implementation demonstrates that results similar to hand-coded HDL can be achieved using the C language, and without using a Low-level style of C code.
標(biāo)簽： Codeveloper implements ImpulseC hardware
上傳時(shí)間： 2014-01-16
上傳用戶：hustfanenze
Introduction ? ? The ARM Cortex -A8 microprocessor is the first applications microprocessor in ARM!ˉs new Cortex family. With high performance and power efficiency, it targets a wide variety of mobile and consumer applications including mobile phones, set-top boxes, gaming consoles and automotive navigation/entertainment systems. The Cortex-A8 processor spans a range of performance points depending on the implementation, delivering over to 2000 Dhrystone MIPS (DMIPS) of performance for demanding consumer applications and consuming less than 300mW for Low-power mobile devices. This translates into a large increase in processing capability while staying with the power levels of previous generations of mobile devices. Consumer applications will benefit from the reduced heat dissipation and resulting Lower packaging and integration costs.
標(biāo)簽： microprocessor Introduction applications Cortex
上傳時(shí)間： 2013-12-09
上傳用戶：xzt
FERRET - a broadcast analysis tool This tool is designed to demonstrate the problem of "data seapage". The average machine broadcasts a lot of information about itself on open networks. This tool captures and organizes this information. This code is extremely Low quality, hacked together in order to demonstrate the problem at the BlackHat Federal 2007 conference. Higher quality code should be available around May 2007 on our website at http://www.erratasec.com.
標(biāo)簽： tool demonstrate broadcast analysis
上傳時(shí)間： 2013-11-30
上傳用戶：1101055045
QualNet Sensor Networks Library QualNet’s new Sensor Networks Library is a much awaited feature set that supports the IEEE 802.15.4 standard, otherwise known as Zigbee. Zigbee networks are Wireless Personal Area Networks (WPANs) that are defi ned by a Low data rate, long battery life, and secure networking. Zigbee networks support automation and remote control
標(biāo)簽： Networks QualNet Library Sensor
上傳時(shí)間： 2017-07-30
上傳用戶：CSUSheep
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both Low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held Low, then the Q output is forced high, and stays high when S returns to Low similarly, if R (Reset) is pulsed high while S is held Low, then the Q output is forced Low, and stays Low when R returns to Low.
標(biāo)簽： using fundamental the RS_latch
上傳時(shí)間： 2017-07-30
上傳用戶：努力努力再努力
While faster processors, larger memory, and powerful graphics are fundamental requirements for workstations, users are also demanding a Low-cost, solution-based approach wrapped around a standards-based technology. The Sun UltraTM 20 Workstation, which leverages the AMD OpteronTM processor with Direct Connect Architecture based on AMD64 technology, provides multiple operating system choices and leading nVidia graphics, delivers a platform that offers flexibility and performance in a cost-effective package with solutions to benefit customers across the board.
標(biāo)簽： requirements fundamental processors graphics
上傳時(shí)間： 2017-08-17
上傳用戶：zhaiye
This document explains the pulse compression technique. Why it is required and how can it be used effectively. The pulse compression technique helps to increase the maximum range without sacrificing the range resolution and still the power requirement remains Low.
標(biāo)簽： compression technique document explains
上傳時(shí)間： 2013-12-18
上傳用戶：fnhhs
a carrier sense multiple access with collision avoidance (CSMA/CA) based MAC protocol, called nanoMAC, suitable for Low bit-rate, Low-power wireless devices with high efficiency
標(biāo)簽： avoidance collision multiple protocol
上傳時(shí)間： 2017-08-28
上傳用戶：小寶愛(ài)考拉
This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, Low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the folLowing components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標(biāo)簽： This microprocessor describes S3C2410X
上傳時(shí)間： 2014-01-11
上傳用戶：shizhanincc
AM26C31CLow Power, I CC = 100 ƒ ⊂ A Typ Operate From a Single 5-V Supply High Speed, t PLH = t PHL = 7 ns Typ Low Pulse Distortion, t sk(p) = 0.5 ns Typ High Output Impedance in Power-Off Conditions Improved Replacement for AM26LS31
標(biāo)簽： Operate Single Supply Power
上傳時(shí)間： 2014-01-20
上傳用戶：gtzj
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