15.2 已經(jīng)加入了有關(guān)貫孔及銲點(diǎn)的Z軸延遲計(jì)算功能. 先開啟 Setup - Constraints - Electrical constraint sets 下的 DRC 選項(xiàng). 點(diǎn)選 Electrical Constraints dialog box 下 Options 頁面 勾選 Z-Axis delay欄.
上傳時(shí)間： 2013-11-12
上傳用戶：Late_Li
USB接口控制器參考設(shè)計(jì),xilinx提供VHDL代碼 usb xilinx vhdl ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上傳時(shí)間： 2013-10-29
上傳用戶：zhouchang199
ref-sdr-sdram-vhdl代碼 SDR SDRAM Controller v1.1 readme.txt This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1. The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture. Last updated September, 2002 Copyright ?2002 Altera Corporation. All rights reserved.
上傳時(shí)間： 2013-10-23
上傳用戶：半熟1994
UART 4 UART參考設(shè)計(jì)，Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
標(biāo)簽： UART Xilinx VHDL 參考設(shè)計(jì)
上傳時(shí)間： 2013-11-02
上傳用戶：18862121743
工作環(huán)境設(shè)置及軟件安裝這章介紹工作環(huán)境的設(shè)置及軟件安裝方面知識(shí)。為什么要進(jìn)行工作環(huán)境設(shè)置呢？因?yàn)楝F(xiàn)在的PCB 工程師要設(shè)計(jì)的文件很多。文件多了如果不進(jìn)行管理就會(huì)很混亂，導(dǎo)致以后的維護(hù)十分困難。所以要從剛開始學(xué)習(xí)的時(shí)候養(yǎng)成一個(gè)好的操作習(xí)慣，這是很有必要的。2.1 建立自己的工作目錄在電腦的桌面上打開我的電腦，在我的電腦中打開D盤。在D 盤中建立三個(gè)文件夾。分別為“D：\EDA”“D：\EDA_LIB”“D：\EDA_PROJECT 三個(gè)文件夾”。如下圖所示：圖2-1-1 “建立工作目錄”建立好三個(gè)文件夾后，在這三個(gè)文件夾中分別另建立一個(gè)新文夾，并命名為Protel99se。三個(gè)文件夾的作用分別是：EDA文件夾是用來存放安裝文件；EDA—LIB 文件夾是用來存放元件庫。EDA—PROJECT 文件夾是用來存放設(shè)計(jì)數(shù)據(jù)。2.2 對(duì)Protel 99se 進(jìn)行安裝設(shè)置好工作目錄后，就可以對(duì)軟件進(jìn)行安裝。圖2-1-2就是Protel 99se的安裝程序。其中“Protel99SP6”是升級(jí)補(bǔ)丁，“Protel99 漢化”是漢化文件。（1）雙擊Setup 安裝圖標(biāo)對(duì)軟件進(jìn)行安裝。
上傳時(shí)間： 2013-10-31
上傳用戶：jrsoft
ORCAD在使用的時(shí)候總會(huì)出現(xiàn)這樣或那樣的問題…但下這個(gè)問題比較奇怪…在ORCAD中無法輸出網(wǎng)表…彈出下面的錯(cuò)誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時(shí)間后發(fā)現(xiàn)問題所在…其實(shí)這個(gè)問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實(shí)際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會(huì)出現(xiàn)這種問題…
上傳時(shí)間： 2013-11-02
上傳用戶：sz_hjbf
上圖為protel99se setup安裝圖片。此版本為protel99se軟件，里面包含有漢化工具，可以直接進(jìn)行漢化。內(nèi)含注冊(cè)信息。并可以免費(fèi)下載。 使用序列號(hào)：SerialNo:NG9A-JVDN-Z4SK-CTTP
上傳時(shí)間： 2013-11-11
上傳用戶：tianming222
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2014-01-24
上傳用戶：s363994250
這個(gè)軟件需要你的本機(jī)操作的。其他機(jī)器是算不出來的！ 就是說 一臺(tái)電腦只有一個(gè)注冊(cè)碼對(duì)應(yīng)！ 這里有個(gè)辦法： MULTISIM2001安裝方法： 一：運(yùn)行SETUP.EXE安裝。在安裝時(shí)，要重新啟動(dòng)計(jì)算機(jī)一次。 二：?jiǎn)?dòng)后在“開始>程序”中找到STARTUP項(xiàng)，運(yùn)行后，繼續(xù)進(jìn)行安裝，安裝過程中，第一次要求輸入“CODE"碼時(shí)， 輸入“PP-0411-48015-7464-32084"輸入后，會(huì)提示"VALID SERIAL NUMBER FOR MULTISIM 2001 POWER-PRO." 按確定，又會(huì)出現(xiàn)一個(gè)“feature code”框，輸入“FC-6424-04180-0044-13881”后， 在彈出的對(duì)話框中選擇“取消”，一路確定即可完成安裝。 三：1.運(yùn)行VERILOG目錄內(nèi)的SETUP安裝 2.運(yùn)行FPGA目錄內(nèi)的SETUP安裝 3.將CRACK目錄內(nèi)的LICMGR.DLL拷貝到WINDOWS系統(tǒng)的SYSTEM 目錄內(nèi) 4.并將VERILOG安裝目錄內(nèi)的同名文件刪除 5.將SILOS.LIC文件拷到VERILOG安裝目錄內(nèi)覆蓋原文件，并作如下編輯： 6.將“COMPUTER_NAME”替換為你的機(jī)器名 7.將“D:\MULTISIM\VERILOG\PATH_TO_SIMUCAD.EXE”替換為你的 實(shí)際安裝路徑。如此你便可以使用VERILOG了。 四：安裝之后，運(yùn)行MULTISIM2001,會(huì)要求輸入“RELEASE CODE",不用著急， 記下“SERIAL NUMBER"和“SIGNATURE NUMBER", 使用CRACK目錄內(nèi)的注冊(cè)器“MULTISIM KEYGEN.EXE" 將剛才記下的兩個(gè)號(hào)碼分別填入后， 即可得到"RELEASE CODE", 以后就可以正常使用了。 五：接下來運(yùn)行 database update目錄中的幾個(gè)文件， 進(jìn)行數(shù)據(jù)庫合并即可。祝你成功！！ 六：?jiǎn)?dòng)MULTISIM2001時(shí)候的注冊(cè)碼 1： PP-0411-48015-7464-32084 2： 37506-86380 3:的三個(gè)空格 1975 2711 4842 里面包含了：Multisim2001漢化破解版、Multisim.V10.0.1.漢化破解版圖解 解壓密碼：www.pp51.com
標(biāo)簽： Multisim 2001 漢化破解版 免費(fèi)下載
上傳時(shí)間： 2013-11-16
上傳用戶：天空說我在
Have you had the exasperating experience of a laptop orPDA defi antly not responding to your commands? Youfrantically press key after key, but to no avail. As hopeturns to anger (but just before you throw the company’slaptop through the window) you slam your fi nger againstthe on/off power button. Ten seconds later, your laptopfi nally surrenders and the screen goes black in a highpitched whimper.
標(biāo)簽： 427 DN 開關(guān)控制器 故障保護(hù)
上傳時(shí)間： 2013-12-10
上傳用戶：Vici
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
