Design for manufacturability and statistical design encompass a number of activities and areas of study spanning the integrated circuit design and manufacturing worlds. In the early days of the planar integrated circuit, it was typical for a handful of practitioners working on a particular design to have a fairly complete understanding of the manufacturing PROCESS, the resulting semiconductor active and passive devices, as well as the resulting circuit - often composed of as few as tens of devices. With the success of semiconductor scaling, predicted and - to a certain extent even driven - by Moore’s law, and the vastly increased complexity of modern nano-meter scale PROCESSes and the billion-device circuits they allow, there came a necessary separation between the various disciplines.
標(biāo)簽： Manufacturability Statistical Design for and
上傳時(shí)間： 2020-06-10
上傳用戶(hù)：shancjb
Current field forecast verification measures are inadequate, primarily because they compress the comparison between two complex spatial field PROCESSes into one number. Discrete wavelet transforms (DWTs) applied to analysis and contemporaneous forecast fields prove to be an insightful approach to verification problems. DWTs allow both filtering and compact physically interpretable partitioning of fields. These techniques are used to reduce or eliminate noise in the verification PROCESS and develop multivariate measures of field forecasting performance that are shown to improve upon existing verification procedures.
標(biāo)簽： field forecast verification
上傳時(shí)間： 2020-07-22
上傳用戶(hù)：
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上傳時(shí)間： 2021-10-22
上傳用戶(hù)：
半導(dǎo)體生產(chǎn)和過(guò)程控制的基礎(chǔ) 這是一本系統(tǒng)介紹芯片生產(chǎn)工藝基礎(chǔ)的好書(shū)，敘事嚴(yán)謹(jǐn)，條理清晰，值得一看
標(biāo)簽： 芯片生產(chǎn)工藝
上傳時(shí)間： 2021-11-03
上傳用戶(hù)：
文章是描述利用VHDL語(yǔ)言進(jìn)行AES加密算法的實(shí)現(xiàn)，AES是目前世界最流行的算法
上傳時(shí)間： 2021-11-12
上傳用戶(hù)：zzzy1997
軟件開(kāi)發(fā)人員必備工具書(shū)，，目錄如下Welcome to Software Construction [1]1.1 What Is Software Construction?1.2 Why Is Software Construction Important?1.3 How to Read This Book......7.1 Valid Reasons to Create a Routine7.2 Design at the Routine Level7.3 Good Routine Names7.4 How Long Can a Routine Be?7.5 How to Use Routine Parameters7.6 Special Considerations in the Use of Functions7.7 Macro Routines and Inline RoutinesDefensive Programming [5.6 + new material]8.1 Protecting Your Program From Invalid Inputs8.2 Assertions8.3 Error Handling Techniques8.4 Exceptions8.5 Barricade Your Program to Contain the Damage Caused by Errors8.6 Debugging Aids8.7 Determining How Much Defensive Programming to Leave in Production Code8.8 Being Defensive About Defensive ProgrammingThe Pseudocode Programming PROCESS [4+new material]9.1 Summary of Steps in Building Classes and Routines9.2 Pseudocode for Pros9.3 Constructing Routines Using the PPP9.4 Alternatives to the PPP......
標(biāo)簽： 代碼大全 軟件開(kāi)發(fā)
上傳時(shí)間： 2021-12-08
上傳用戶(hù)：20125101110
基于LabVIEW2012FPGA模式的數(shù)據(jù)采集和存儲(chǔ)系統(tǒng)摘 要：為了提高數(shù)據(jù)采集系統(tǒng)精度，減少開(kāi)發(fā)成本，提高開(kāi)發(fā)效率，基于LabVIEW虛擬儀器開(kāi)發(fā)工具研究并設(shè)計(jì)了一 種數(shù)據(jù)采集系統(tǒng)。該系統(tǒng)采用FPGA編程模式和網(wǎng)絡(luò)流技術(shù)實(shí)現(xiàn)大批量數(shù)據(jù)實(shí)時(shí)傳輸，并對(duì)數(shù)據(jù)進(jìn)行分析處理和存儲(chǔ)。系 統(tǒng)硬件采用美國(guó)NI實(shí)時(shí)控制器CRIO?9025，實(shí)現(xiàn)16路數(shù)據(jù)可靠采集與存儲(chǔ)。實(shí)驗(yàn)仿真及實(shí)際運(yùn)行結(jié)果表明該數(shù)據(jù)采集系 統(tǒng)能夠精確地對(duì)數(shù)據(jù)進(jìn)行實(shí)時(shí)采集以及分析處理，達(dá)到了項(xiàng)目要求。 關(guān)鍵詞：FPGA；FIFO；網(wǎng)絡(luò)流；數(shù)據(jù)采集系統(tǒng)；SQL數(shù)據(jù)庫(kù) 中圖分類(lèi)號(hào)：TN98?34 文獻(xiàn)標(biāo)識(shí)碼：A 文章編號(hào)：1004?373X（2014）14?0142?04 Data acquisition and storage system based on LabVIEW 2012FPGA pattern WANG Shu?dong1,2 ，WEI Kong?zhen1 ，LI Xiao?pei1 （1. College of Electrical and Information Engineering，Lanzhou University of Technology，Lanzhou 730050，China； 2. Gansu Key Laboratory for Advanced Industrial PROCESS Control，Lanzhou 730050，China）
標(biāo)簽： labview fpga 數(shù)據(jù)采集
上傳時(shí)間： 2022-02-18
上傳用戶(hù)：
本文主要介紹如何在Wado設(shè)計(jì)套件中進(jìn)行時(shí)序約束，原文出自 xilinx中文社區(qū)。1 Timing Constraints in Vivado-UCF to xdcVivado軟件相比于sE的一大轉(zhuǎn)變就是約束文件，5E軟件支持的是UcF（User Constraints file，而 Vivado軟件轉(zhuǎn)換到了XDc（Xilinx Design Constraints）。XDC主要基于SDc（Synopsys Design Constraints）標(biāo)準(zhǔn)，另外集成了Xinx的一些約束標(biāo)準(zhǔn)可以說(shuō)這一轉(zhuǎn)變是xinx向業(yè)界標(biāo)準(zhǔn)的靠攏。Altera從 TimeQuest開(kāi)始就一直使用SDc標(biāo)準(zhǔn)，這一改變，相信對(duì)于很多工程師來(lái)說(shuō)是好事，兩個(gè)平臺(tái)之間的轉(zhuǎn)換會(huì)更加容易些。首先看一下業(yè)界標(biāo)準(zhǔn)SDc的原文介紹：Synopsys widely-used design constraints format, known as sDc, describes the design intent"and surrounding constraints for synthesis, clocking, timing, power, test and environmental and operating conditions. sDc has been in use and evolving for more than 20 years, making it the most popular and proven format for describing design constraints. Essentially all synthesized designs use SDc and numerous EDa companies have translators that can read and PROCESS sDc
標(biāo)簽： vivado
上傳時(shí)間： 2022-03-26
上傳用戶(hù)：
以AT89S52單片機(jī)為控制核心,采用電容降壓技術(shù),Buck電路拓?fù)?PWM驅(qū)動(dòng)模塊和功率器件散熱設(shè)計(jì),通過(guò)高速的數(shù)據(jù)采集、主功率輸入輸出模塊和控制模塊,設(shè)計(jì)一種新型智能車(chē)載充電器.在充電過(guò)程中,通過(guò)負(fù)脈沖瞬間放電實(shí)現(xiàn)對(duì)鉛酸蓄電池的再生修復(fù),提高電池的有效容量,延長(zhǎng)使用壽命.該充電器體積小、速度快、效率高、可靠性好.With AT89S52 single chip computer as the control core,a new type of intelligent car-carried charger was designed by using capacitance step-down technology,Buck circuit topology,PWM driving module and power device heat dissipation design,through high-speed data acquisition,main power input and output module and control module.In the charging PROCESS,the regeneration and repair of lead-acid batteries are realized by instantaneous discharge of negative pulse,which improves the effective capacity of batteries and prolongs their service life.The charger has the advantages of small size,fast speed,high efficiency and good reliability.
標(biāo)簽： 車(chē)載充電器
上傳時(shí)間： 2022-03-27
上傳用戶(hù)：
學(xué)習(xí)本章要達(dá)到的目標(biāo)：口1.理解 Linux內(nèi)核編譯選項(xiàng)的含義口2.學(xué)會(huì)根據(jù)不同的硬件配置裁減定制內(nèi)核；口3.理解內(nèi)核編譯過(guò)程中每一步的功能，并編譯 Linux2.630內(nèi)核。需要去重新編譯 Linux內(nèi)核口增加操作系統(tǒng)對(duì)新的硬件設(shè)備的支持口增加內(nèi)核新的功能口對(duì)內(nèi)核代碼或內(nèi)核配置進(jìn)行優(yōu)化時(shí)Prompt for development and/or incomplete code/drivers口顯示處于開(kāi)發(fā)調(diào)試中或尚未完善的代碼或驅(qū)口選中：如果是測(cè)試人員或者開(kāi)發(fā)者；口不選：其他情況Local version append to kerne release口追加本地版本號(hào)口使用命令“uname-a”進(jìn)行查看。POSIX Message Queues口 POSIX消息隊(duì)列的支持，這是 POSIX進(jìn)程間通信的一部分BSD PROCESS Accounting口將進(jìn)程的統(tǒng)計(jì)信息寫(xiě)入文件口信息通常包括建立時(shí)間、所有者、命令名稱(chēng)、內(nèi)存使用、控制終端等，這個(gè)選項(xiàng)一般是選擇的。Enable loadable module support口使能可加載模塊支持口如果使能此選項(xiàng)則可以通過(guò)"makemodules_insta"把內(nèi)核模塊安裝在/lib/modules/中Kernel support for ELF binaries口內(nèi)核對(duì)ELF文件格式的支持口ELF是開(kāi)放平臺(tái)下最常用的二進(jìn)制文件格式支持動(dòng)態(tài)連接，支持不同的硬件平臺(tái)Kernel support for a out and ECOFF binaries口早期UNIX系統(tǒng)的可執(zhí)行文件格式，目前已經(jīng)被ELF格式取代Unix domain sockets口本機(jī)高效率的 Socket口僅能運(yùn)行在本機(jī)上的高效率的 Socket，簡(jiǎn)稱(chēng) Unix socket?？诤芏噙M(jìn)程使用為這種機(jī)制在操作系統(tǒng)內(nèi)部進(jìn)行進(jìn)程間通信，例如 X Window和 syslog等TCP/IP networking口TcP/IP網(wǎng)絡(luò)協(xié)議的支持
標(biāo)簽： linux
上傳時(shí)間： 2022-03-29
上傳用戶(hù)：kingwide
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