This research project evaluates startup times of the linux boot process from Power-on until user login. Time consuming parts of the boot process are investigated and methods how to speed up the whole process are discussed.
標(biāo)簽： evaluates research Power-on project
上傳時間： 2013-12-18
上傳用戶：sqq
pic example code ,such as pic watch dog, power on and power off ,reset
標(biāo)簽： power pic example reset
上傳時間： 2013-12-21
上傳用戶：風(fēng)之驕子
Calculates power drain for wlan, BT, backlight etc and shows the results. Good to know, what setting consumes most of the battery power on your windows mobile / Pocket PC.
標(biāo)簽： Calculates backlight results setting
上傳時間： 2013-12-27
上傳用戶：wfl_yy
Linear Technology offers a variety of devices that simplifyconverting power from a USB cable, but the LTC®3455represents the highest level of functional integration yet. The LTC3455 seamlessly manages power flowbetween an AC adapter, USB cable and Li-ion battery,while complying with USB power standards, all from a4mm × 4mm QFN package. In addtion, two high efficiencysynchronous buck converters generate low voltage railswhich most USB-powered peripherals require. TheLTC3455 also provides Power-on reset signals for themicroprocessor, a Hot SwapTM output for poweringmemory cards as well as an uncommitted gain blocksuitable for use as a low-battery comparator or an LDOcontroller. The PCB real estate required for the entire USBpower control circuit and two DC/DC converters is only225mm2.
上傳時間： 2013-11-02
上傳用戶：名爵少年
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal Power-on resetfunction.
標(biāo)簽： switch Octal 9549 with
上傳時間： 2014-11-22
上傳用戶：xcy122677
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
標(biāo)簽： channel 9548A 9548 PCA
上傳時間： 2013-10-13
上傳用戶：bakdesec
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The Power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
標(biāo)簽： C-bus SMBus reset port
上傳時間： 2014-01-18
上傳用戶：bs2005
The outputs of the PCA9518 are immediately available as soon as there is a voltage present on thesupply >~1V and behave as described above. The Power-on reset of the PCA9518A keeps the outputsturned off during power-up and maintains the high impedance of the outputs throughout the power-upcycle. There is an additional built-in delay after power-up that allows the analog circuits to stabilize beforethe part is activated.
標(biāo)簽： Replacement 9518 NXP PCA
上傳時間： 2013-10-26
上傳用戶：13817753084
第一版YL2410開發(fā)板的BIOS 功能比較簡單，上電之后，LCD顯示藍(lán)色、綠色、紅色三個豎條 同時串口顯示如下： Power on reset ************************************ * * * YL2410 Board BIOS V2006 * * Http://www.ucdragon.com * * * ************************************ NAND Flash Boot Please select function : 0 : USB download file（通過USB下載文件） 1 : Uart download file（通過串口下載文件） 2 : Write Nand flash with download file（將下載的文件燒寫到NandFlash） 3 : Load Pragram from Nand flash and run（從NandFlash裝載文件并運行） 4 : Erase Nand flash regions（擦除NandFlash區(qū)域） 5 : Write NOR flash with download file（將下載的文件燒寫到NorFlash） 6 : Set boot params（設(shè)置Linux啟動相關(guān)參數(shù)） 7 : Set AutoBoot parameter,1:linux 2:wince(設(shè)置WINCE自啟動）
標(biāo)簽： 2410 BIOS YL 開發(fā)板
上傳時間： 2015-09-15
上傳用戶：Amygdala
The first task at hand is to set up the endpoints appropriately for this example. The following code switches the CPU clock speed to 48 MHz (since at Power-on default it is 12 MHz), and sets up EP2 as a Bulk OUT endpoint, 4x buffered of size 512, and EP6 as a Bulk IN endpoint, also 4x buffered of size 512. This set-up utilizes the maximum allotted 4-KB FIFO space. It also sets up the FIFOs for manual mode, word-wide operation, and goes through a FIFO reset and arming sequence to ensure that they are ready for data operations
標(biāo)簽： appropriately The endpoints following
上傳時間： 2013-12-02
上傳用戶：dianxin61
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
