Universival Asychronous Receiver/Transmitter（通用異步串行口），UART 是一種較為通用的數據傳輸的方法（即Start Bit＋Data＋Check＋StopBit），而COM 口中Rx、Tx 的數據格式即為UART。UART 和RS232是兩種異步數據傳輸標準.計算機中的COM1和COM2都是RS232串行通信標準接口。當Uart 接口連到PC 機上時，需要接RS232電平轉換電路。
上傳時間： 2021-11-30
上傳用戶：
spi 通信的master部分使用的verilog語言實現，可以做為你的設計參考。module spi_master(rstb,clk,mlb,start,tdat,cdiv,din, ss,sck,dout,done,rdata); input rstb,clk,mlb,start; input [7:0] tdat; //transmit data input [1:0] cdiv; //clock divider input din; output reg ss; output reg sck; output reg dout; output reg done; output reg [7:0] rdata; //received dataparameter idle=2'b00; parameter send=2'b10; parameter finish=2'b11; reg [1:0] cur,nxt; reg [7:0] treg,rreg; reg [3:0] nbit; reg [4:0] mid,cnt; reg shift,clr;
上傳時間： 2022-02-03
上傳用戶：
The PW5300 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.2? powerMOSFET make this regulator highly power efficient. The internal compensation network alsominimizes as much as 6 external component counts. The non-inverting input of error amplifierconnects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrushcurrent. The PW5300 is available in the SOT23-6L package and provides space-saving PCB for theapplication fields
標簽： pw5300
上傳時間： 2022-02-11
上傳用戶：jiabin
PW1555 is a programmable current limit switch with input voltage range selection and outputvoltage clamping. Extremely low RDS(ON) of the integrated protection N-channel FET helps toreduce power loss during the normal operation. Programmable soft-start time controls the slew rateof the output voltage during the start-up time. Independent enable control allows the complicatedsystem sequencing control. It integrates the over-temperature protection shutdown andautorecovery with hystersis
標簽： pw1555
上傳時間： 2022-02-14
上傳用戶：
6601是一款集成多種用于USB輸出端口的快充協議芯片,支持的多種協議包括QC3.0/QC2.0(Quick Charge) ClassA/ClassB(36W),FCP, AFC,Apple 2.4A, BC1.2以及三星2.0A等。6601支持自動檢測設備類型和充電協議切換,自動響應快充協議請求: HL6601通過調接FB的Source/Sink電流來控制輸出電壓
標簽： fp6601q 快充協議 華為快充協議 qc2.0 qc3.0
上傳時間： 2022-02-21
上傳用戶：
IP2726_AC_FBR 是一款集成多種協議、用于 USB-A 和 TYPE-C 雙端口輸出的快充協議 IC。支持多 種快充協議，包括 USB TypeC DFP，PD2.0/PD3.0/PPS , HVDCP QC4+/QC4/QC3.0/QC2.0（Quick Charge），FCP （Hisilicon? Fast Charge Protocol），SCP（Super Fast Charge），AFC（Samsung? Adaptive Fast Charge）， MTK PE+ 2.0/1.1（ MediaTek Pump Express Plus 2.0/1.1），Apple 2.4A，BC1.2 以及 2.0A。為適 配器、車充等單向輸出應用提供完整的 TYPE-C 解決 方案。 IP2726_AC_FBR 具備高集成度與豐富功能，在 應用時僅需極少的外圍器件，有效減小整體方案的 尺寸，降低 BOM 成本。
標簽： usb
上傳時間： 2022-02-24
上傳用戶：xsr1983
IP2723T 是一款集成多種協議、用于 USB 輸出 端口的快充協議 IC。支持多種快充協議，包括 USB TypeC DFP ， PD2.0/PD3.0/PPS , HVDCP QC4/QC4+/QC3.0/QC2.0 （ Quick Charge ）， FCP （Hisilicon? Fast Charge Protocol），SCP（Super Fast Charge），AFC（Samsung? Adaptive Fast Charge）， MTK PE+ 2.0/1.1（MediaTek Pump Express Plus 2.0/1.1），Apple 2.4A，BC1.2 以及三星 2.0A。為適 配器、車充等單向輸出應用提供完整的 TYPE-C 解決 方案。
標簽： IP2723
上傳時間： 2022-03-04
上傳用戶：
電子書-RTL Design Style Guide for Verilog HDL540頁A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1’ is output when the START signal rises. Therefore, the FF data input is fixed at the power supply, since the typical value ’1’ is output following the rise of the START signal. When FF input values are fixed, the fixed inputs become untestable and the fault detection rate drops. When implementing a scan design and converting to a scan FF, the scan may not be executed properl not be executed properly, so such descriptions , so such descriptions are not are not recommended. recommended.[1] As in the lower part of Example 2-21, be sure to construct a synchronous type of circuit and ensure that the clock signal is input to the clock pin of the FF. Other than the sample shown in Example 2-21, there are situations where for certain control signals, those that had been switched due to the conditions of an external input will no longer need to be switched, leaving only a FF. If logic exists in a lower level and a fixed value is input from an upper level, the input value of the FF may also end up being fixed as the result of optimization with logic synthesis tools. In a situation like this, while perhaps difficult to completely eliminate, the problem should be avoided as much as possible.
標簽： RTL verilog hdl
上傳時間： 2022-03-21
上傳用戶：canderile
在傳統智能小車驅動電路設計中,較多考慮使用直流電機還是步進電機,電機功率、能耗等性能參數。使用具有armCortexM4內核的STM32嵌入式平臺控制四輪的4個直流電機。文章基于PWM技術及PID算法,對四輪進行精準地速度、轉向及啟停控制,實驗表明此小車具有優越各種地形適應能力。In the traditional intelligent car drive circuit design,DC motor or stepping motor,motor power,energy consumption and other performance parameters are considered.The four DC motors with four wheels are controlled by STM32 embedded platform with arm Cortex M4 kernel.Based on the PWM technology and PID algorithm,the accurate ground speed,steering,and start-stop control of the four wheels are carried out.The experiment shows that the vehicle has the superior adaptability to all kinds of terrains.
上傳時間： 2022-04-02
上傳用戶：
1. Preface2. The concept2.2. Prescience 2.3. Reading guide 2.4. Abbreviations 2.5. Version management3. Hardware3.2. ESP32 3.3.2. Hardware schema 3.3.3. DHT22 and level shifter 3.3.4. Geekcreit? ESP32 Development Board4. Software4.2. Installatie van GIT 4.3. Installatation of the ESP32 Core 4.4. Installation of the Xtensa and ESP32 Tools 4.5. Python 4.5.1. Install Python 4.5.2. Installation of pySerial and EspTool 4.6. Test the software installation5. The ESP32 IoT project 5.1.1. WiFi connection 5.1.2. Setup date and time 5.1.3. MQTT connection 5.1.4. Determining temperature and humidity 5.2. IOT_ESP32_Project source6. Test6.2. ESP32, NodeJS, MongoDB en Mosca 6.2.1. Start MongoDB 6.2.2. Start NodeJS Express serve and Mosca broker 6.2.3. Start the ESP32 6.2.4. Start an Chrome browser
上傳時間： 2022-04-05
上傳用戶：kingwide
