并行NOR Flash每次傳輸多個bit位的數(shù)據(jù)，而串行NOR Flash每次傳輸一個bit位的數(shù)據(jù)。并行NOR Flash比串行NOR Flash具有更快的傳輸速度。
上傳時間： 2013-11-01
上傳用戶：liu123
為避免在程序運(yùn)行時向單片機(jī)內(nèi)置的Flash寫入數(shù)據(jù)導(dǎo)致復(fù)位，采用調(diào)用鎖定與關(guān)鍵碼的操作方法對C8051F35X型單片機(jī)的Flash進(jìn)行擦除、寫入和讀取操作，并提供程序范例。該方法無需任何接口電路，使用方便，成本低且安全可靠。此方法已應(yīng)用于包裝機(jī)控制器，實(shí)現(xiàn)包裝參數(shù)的保存和修改，效果良好。
標(biāo)簽： C8051F35X Flash 單片機(jī) 存儲器
上傳時間： 2014-12-27
上傳用戶：363186
無論是功能，還是性能，德州儀器(TI)的MSC1210單片機(jī)都達(dá)到了混合信號處理的顛峰，它集成了一個增強(qiáng)型8051內(nèi)核，有8路24位低功耗(4roW)A． A／D轉(zhuǎn)換器；21個中斷源；16位PWM；全雙工UART(并兼容有SPI功能)；停止方式電流小于1 A；比標(biāo)準(zhǔn)8051內(nèi)核執(zhí)行速度快3倍且全兼容；片內(nèi)集成32K字節(jié)FLASH，而且FLASH可定義為程序分區(qū)與數(shù)據(jù)存儲分區(qū)，給設(shè)計帶來非常大的靈活性；片內(nèi)SRAM也多達(dá)1．2K字節(jié)；采用TQFP64小型封裝。由于具有如此高的模擬和數(shù)字集成度，對各種要求小體積、高集成度和精確測量而言，MCS1210實(shí)為理想的整合選擇。表1列出MSC1210的主要特性。
標(biāo)簽： 1210 MSC 24位 AD轉(zhuǎn)換
上傳時間： 2013-10-11
上傳用戶：yangzhiwei
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing orders, that information being relied onis current and complete. All products are sold subject to the terms and conditions of sale suppliedat the time of order acknowledgement, including those pertaining to warranty, patentinfringement, and limitation of liability.
標(biāo)簽： Assembly Language C6000 320C
上傳時間： 2013-11-12
上傳用戶：chens000
鍵盤是單片機(jī)系統(tǒng)中重要的人機(jī)交互方式之一。電梯、遙控器、電話、門禁系統(tǒng)都需要用到單片機(jī)所構(gòu)成的鍵盤。當(dāng)采用鍵盤掃描方式時，MCU在效率上存在著一定的浪費(fèi)，而且由于程序的不停循環(huán)掃描，另一方面也相對地增加了系統(tǒng)的功耗。LPC900系列單片機(jī)提供了節(jié)電模式和鍵盤中斷激活，有效地解決了以上問題。本文將以LPC900 Flash 單片機(jī)為準(zhǔn)，和大家一起探討鍵盤電路的構(gòu)建及程序的設(shè)計。
標(biāo)簽： Flash LPC 900 單片機(jī)
上傳時間： 2013-11-16
上傳用戶：tangsiyun
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
標(biāo)簽： master C-bus 9541 PCA
上傳時間： 2013-10-09
上傳用戶：3294322651
10月22日，德州儀器 (TI) 宣布推出價格更低的、基于 Stellaris ARM Cortex™-M3 的全新微處理器產(chǎn)品，擴(kuò)展了旗下微處理器 (MCU) 陣營，從而為開發(fā)人員滿足嵌入式設(shè)計需求提供了更高的靈活性。29 款全新 Stellaris MCU 包括針對運(yùn)動控制應(yīng)用、智能模擬功能以及擴(kuò)展的高級連接選項(xiàng)等的獨(dú)特 IP，可為工業(yè)應(yīng)用提供各種價格／性能的解決方案。此外，該產(chǎn)品系列還可提供更大范圍的存儲器引腳兼容以及最新緊湊型封裝，可顯著節(jié)省空間與成本。由于 Stellaris MCU 卓越的集成度已融入 TI 的規(guī)模效應(yīng)之中，由此帶來的高效率可使整個 Stellaris 系列的價格平均下降 13%。TI 綜合 StellarisWare® 軟件可為每款器件提供支持，從而可加速能源、安全以及連接市場領(lǐng)域的應(yīng)用開發(fā)。
標(biāo)簽： Stelleris Cortex-M AR 內(nèi)核
上傳時間： 2013-11-14
上傳用戶：如果你也聽說
Although Stellaris microcontrollers have generous internal SRAM capabilities, certain applicationsmay have data storage requirements that exceed the 8 KB limit of the Stellaris LM3S8xx seriesdevices. Since microcontrollers do not have an external parallel data-bus, serial memory optionsmust be considered. Until recently, the ubiquitous serial EEPROM/flash device was the only serialmemory solution. The major limitations of EEPROM and flash technology are slow write speed, slowerase times, and limited write/erase endurance.Recently, serial SRAM devices have become available as a solution for high-speed dataapplications. The N256S08xxHDA series of devices, from AMI Semiconductor, offer 32 K x 8 bits oflow-power data storage, a fast Serial Peripheral Interface (SPI) serial bus, and unlimited write cycles.The parts are available in 8-pin SOIC and compact TSSOP packages.
標(biāo)簽： Adding Serial SRAM 32
上傳時間： 2013-10-14
上傳用戶：cxl274287265
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標(biāo)簽： MULTICHANNEL 5.5 TO RS
上傳時間： 2013-10-19
上傳用戶：ddddddd
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
標(biāo)簽： ISOLATORS DIGITAL DUAL
上傳時間： 2013-10-24
上傳用戶：hbsunhui
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