3D Statistical shape analysis by SHPARM method: code and paper. From the top group at UNC.
標簽： Statistical analysis SHPARM method
上傳時間： 2016-10-20
上傳用戶：wfl_yy
32 * 32 dot-matrix program, set up the typewriter font size type 32 * 32 dot-matrix program, set up the typewriter font size type
標簽： dot-matrix program 32 typewriter
上傳時間： 2013-11-29
上傳用戶：古谷仁美
SET Sensor SIV100B驅動調試代碼
上傳時間： 2016-10-29
上傳用戶：h886166
iic總線控制器VHDL實現 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
標簽： VHDL c_control vhd control
上傳時間： 2016-10-30
上傳用戶：woshiayin
Set data back for Tornado 2.2.1
上傳時間： 2014-01-02
上傳用戶：wlcaption
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2014-01-20
上傳用戶：三人用菜
The DSKs or eZdspTM LF2407 and the DMC1500 make up a table top motor development system which allows engineers and software developers to evaluate certain characteristics of the TMS320F240, TMS320F243, and TMS320LF2407 DSPs to determine if the processor meets the designers application requirements. Evaluators can create software to execute onboard or expand the system in a variety of ways.
標簽： development eZdspTM system allow
上傳時間： 2013-12-24
上傳用戶：zhuoying119
能計算數學函數的計算器,有一千多行代碼的程序.這個計算器可用 set 命令自定義變量，也可以用 view 今天查看變量的值，在程序里有一個設置小數顯示數度的全局變量 prec 可以用 set 對它重新賦值，值的范圍是 0 － 100 的整數，默認是 6 ，將 sin arcsin tan ln 等數學函數轉換成內部表示，以便于將之與一般的運算符統一處理。程序還對小數和整數加以了區別，增加了求余去處符 ‘\’、百分符‘％’。功能還算比較完善。
上傳時間： 2014-01-20
上傳用戶：hakim
英文 網絡課件 Computer Networking: A Top Down Approach Featuring the Internet, 3rd edition. Jim Kurose, Keith Ross Addison-Wesley, July 2004.
標簽： Networking Featuring Computer Approach
上傳時間： 2014-07-24
上傳用戶：123啊
