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  • 射頻基礎(chǔ)知識

    Radio frequency (RF) can be a complex subject to navigate, but it does not have to be. If you are just getting started with radios or maybe you cannot find that old reference book about antenna aperture, this guide can help. It is intended to provide a basic understanding of RF technology, as well act as a quick reference for those who “know their stuff” but may be looking to brush up on that one niche term that they never quite understood. This document is also a useful reference for Maxim’s products and data sheets, an index to deeper analysis found in our application notes, and a general reference for all things RF.

    標(biāo)簽: 射頻 基礎(chǔ)知識

    上傳時間: 2013-10-23

    上傳用戶:685

  • 無線技術(shù)指南

    Radio frequency (RF) can be a complex subject to navigate, but it does not have to be. If you are just getting started with radios or maybe you cannot find that old reference book about antenna aperture, this guide can help. It is intended to provide a basic understanding of RF technology, as well act as a quick reference for those who “know their stuff” but may be looking to brush up on that one niche term that they never quite understood. This document is also a useful reference for Maxim’s products and data sheets, an index to deeper analysis found in our application notes, and a general reference for all things RF.

    標(biāo)簽: 無線技術(shù)

    上傳時間: 2013-10-08

    上傳用戶:kinochen

  • UHF讀寫器設(shè)計中的FM0解碼技術(shù)

       針對UHF讀寫器設(shè)計中,在符合EPC Gen2標(biāo)準(zhǔn)的情況下,對標(biāo)簽返回的高速數(shù)據(jù)進(jìn)行正確解碼以達(dá)到正確讀取標(biāo)簽的要求,提出了一種新的在ARM平臺下采用邊沿捕獲統(tǒng)計定時器數(shù)判斷數(shù)據(jù)的方法,并對FM0編碼進(jìn)行解碼。與傳統(tǒng)的使用定時器定時采樣高低電平的FM0解碼方法相比,該解碼方法可以減少定時器定時誤差累積的影響;可以將捕獲定時器數(shù)中斷與數(shù)據(jù)判斷解碼相對分隔開,使得中斷對解碼影響很小,實(shí)現(xiàn)捕獲與解碼的同步。通過實(shí)驗表明,這種方法提高了解碼的效率,在160 Kb/s的接收速度下,讀取一張標(biāo)簽的時間約為30次/s。 Abstract:  Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator, the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level, the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding, so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding, at 160 Kb/s receiving speed, the time of the interrogator to read a tag is about 30 times/s.

    標(biāo)簽: UHF FM0 讀寫器 解碼技術(shù)

    上傳時間: 2013-11-10

    上傳用戶:liufei

  • DN492-雙單片降壓集成溫度監(jiān)控模塊

      Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.

    標(biāo)簽: 492 DN 降壓 溫度監(jiān)控

    上傳時間: 2014-01-03

    上傳用戶:Huge_Brother

  • RT9018,RT9018AB-05 datasheet pdf

    The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).

    標(biāo)簽: 9018 datasheet RT

    上傳時間: 2013-10-10

    上傳用戶:geshaowei

  • LPC314x系列ARM微控制器用戶手冊

    The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted atconsumer, industrial, medical, and communication markets. To optimize system powerconsumption, the LPC314x have multiple power domains and a very flexible ClockGeneration Unit (CGU) that provides dynamic clock gating and scaling.

    標(biāo)簽: 314x LPC 314 ARM

    上傳時間: 2013-10-11

    上傳用戶:yuchunhai1990

  • LPC315x系列ARM微控制器用戶手冊

    The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.

    標(biāo)簽: 315x LPC 315 ARM

    上傳時間: 2014-01-17

    上傳用戶:Altman

  • Cimatron E 7.0教程

    Cimatron E 7.0教程 使用Cimatron E 起草應(yīng)用,建立部分或者組裝圖圖表是可能的,由2D 風(fēng)景組成。在畫的每一個內(nèi)有一條或更多床單,起草的符號和注釋可能被增加并且編輯。 這些畫圖表包含象 起草標(biāo)準(zhǔn)那樣的具體的特性,意見歸因于,框架,模板等等。在各種各樣的起草的概念將的這個練習(xí)過程中沿著邊討論Cimatron E的動態(tài)的能力。 1、打開一份起草的資料 Open up the Drafting application within Cimatron E. 2、現(xiàn)在起草應(yīng)用的Cimatron 打開 資料在Cimatron E里使用起草被叫為一張畫。 有一條床單的一張畫被創(chuàng)造一份起草的資料自動創(chuàng) 造。 3、建立床單 一條床單包含一個一個模型,部分或者會議的2D 意見的布局。 除2D之外幾何學(xué)建立使用 sketcher,起草符號,注釋能被增加給床單。 無限的床單的數(shù)量能被歸入一張畫允許一象要求 的那樣安排許多意見。

    標(biāo)簽: Cimatron 7.0 教程

    上傳時間: 2014-12-31

    上傳用戶:13817753084

  • High-speed Digital Design 中文版(高速數(shù)字設(shè)計)

    介紹高速電路的設(shè)計

    標(biāo)簽: High-speed Digital Design 高速數(shù)字

    上傳時間: 2013-12-02

    上傳用戶:wentianyou

  • Nios II定制指令用戶指南

         Nios II定制指令用戶指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II arithmetic logic unit (ALU) as shown in Figure 1–1.

    標(biāo)簽: Nios 定制 指令 用戶

    上傳時間: 2013-10-12

    上傳用戶:kang1923

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