Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
標簽： CPLD
上傳時間： 2014-12-05
上傳用戶：qazxsw
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
標簽： GUIDELINES LAYOUT 320 PCB
上傳時間： 2013-10-10
上傳用戶：manga135
8051參考設(shè)計，與其他8051的免費IP相比，文檔相對較全，Oregano System 提供 This is version 1.3 of the MC8051 IP core. September 2002: Oregano Systems - Design & Consulting GesmbH change history: - Improved tb_mc8051_siu_sim.vhd to verify duplex operation. - Corrected problem with duplex operation in file mc8051_siu_rtl.vhd
上傳時間： 2013-11-06
上傳用戶：XLHrest
在集成電路內(nèi)建自測試的過程中，電路的測試功耗通常顯著高于正常模式產(chǎn)生的功耗，因此低功耗內(nèi)建自測試技術(shù)已成為當(dāng)前的一個研究熱點。為了減少被測電路內(nèi)部節(jié)點的開關(guān)翻轉(zhuǎn)活動率，研究了一種隨機單輸入跳變（Random Single Input change，RSIC）測試向量生成器的設(shè)計方案，利用VHDL語言描述了內(nèi)建自測試結(jié)構(gòu)中的測試向量生成模塊，進行了計算機模擬仿真并用FPGA（EP1C6Q240C8）加以硬件實現(xiàn)。實驗結(jié)果證實了這種內(nèi)建自測試原理電路的正確性和有效性。
上傳時間： 2013-10-08
上傳用戶：llwap
Abstract: How can an interface change a happy face to a sad face? Engineers have happy faces when an interface works properly.Sad faces indicate failure somewhere. Because interfaces between microprocessors and ICs are simple—even easy—they are oftenignored until interface failure causes sad faces all around. In this article, we discuss a common SPI error that can be almostimpossible to find in a large system. Links to interface tutorial information are provided for complete information. Noise as a systemissue and ICs to minimize its effects are also described.
上傳時間： 2013-11-18
上傳用戶：zgz317
AFD - Advanced Filter Design using MATLABMiroslav D. Lutovac, Dejan V. Tosicversion 1.00 released 15 October 1999This program is freeware.Unpack with path names, for exampleDOS: pkunzip -d afdunix: unzip -L afdAfter unpacking afd.zip, and run MATLAB,change directory to afdfrom the MATLAB command window.Execute demoafd to quickly scan the AFD operation.
標簽： D. V. MATLABMiroslav Tosicversion
上傳時間： 2015-03-21
上傳用戶：er1219
模糊神經(jīng)網(wǎng)絡(luò)采用matlab編程 o install NEFCON follow these steps: 1. Unpack the tar file NEFCON.TAR into your MATLAB working directory: tar xf NEFCON.TAR 2. Start MATLAB 3. change to the installation directory. 4. change to the NEFCON directory. 5. Start the STARTUP M-file to initialize NEFCON.
標簽： NEFCON install matlab follow
上傳時間： 2014-01-10
上傳用戶：qiao8960
This software was done in part for a textbook on AI I ve written called _The Basis of AI_ (tentative title, subject to change but not if I get my way). For details see: http://www.mcs.com/~drt/basisofai.html
標簽： tentative software textbook written
上傳時間： 2015-03-30
上傳用戶：cxl274287265
This example program shows how to configure and use the A/D Converter of the following microcontroller: STMicroelectronics ST10F166 After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port. To run this program... Build the project (Project Menu, Build Target) Start the debugger (Debug Menu, Start/Stop Debug Session) View the Serial Window (View Menu, Serial Window #1) View the A/D converter peripheral (Peripheral Menu, A/D Converter) Run the program (Debug Menu, Go) A debug script (debug.ini) creates buttons that set different analog values in A/D channels. As the program runs, you will see the A/D input and output change. Other buttons create signals that generate sine wave or sawtooth patterns as analog inputs. µ Vision3 users may enable the built-in Logic Analyzer to view, measure and compare these input signals graphically.
標簽： microcontroll Converter configure following
上傳時間： 2014-12-01
上傳用戶：獨孤求源
Setting and Changing Column Widths By default, all columns in a table start out with equal width, and the columns automatically fill the entire width of the table. When the table becomes wider or narrower (which might happen when the user resizes the window containing the table), all the column widths change appropriately.
標簽： Changing Setting default columns
上傳時間： 2015-05-04
上傳用戶：璇珠官人
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