Abstract七段顯示器在de2可當(dāng)成Verilog的console，做為16進(jìn)位的輸出結(jié)果。Introduction使用環(huán)境：Quartus II 7.2 SP1 + de2(Cyclone II EP2C35F627C6)簡(jiǎn)單的使用switch當(dāng)成2進(jìn)位輸入，并用8位數(shù)的七段顯示器顯示16進(jìn)位的結(jié)果。
This tutorial explains how the SDRAM chip on ltera’s de2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
This tutorial explains how to communicate with IO devices on the de2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The fi rst program uses the programmed I/O approach and the second program uses interrupts.
