These files contain all of the code listings in Java 2: The Complete Reference The source code is organized into files by chapter. Within each chapter file, the listings are stored in the same order as they appear in the book. Simply edit the appropriate file to extract the listing in which you are interested. The code for Scrabblet is in its own ZIP file, called CHAP32.ZIP.
標(biāo)簽： The Reference Complete listings
上傳時(shí)間： 2013-11-29
上傳用戶：3到15
利用java實(shí)現(xiàn)文件的AES加密功能 This Java AES Crypt package contains the Java class es.vocali.util.AESCrypt, which provides file encryption and decryption using aescrypt file format. Requirements The Java AES Crypt package only works in Java 6, but can be easily adapted to Java 5 by replacing the call to NetworkInterface.getHardwareAddress() with something else. In order to use 256 bit AES keys, you must download and install "Java Cryptography Extension (JCE) Unlimited Strength Jurisdiction Policy Files" from http://java.sun.com/javase/downloads/index.jsp
標(biāo)簽： Java AES AESCrypt contains
上傳時(shí)間： 2017-02-11
上傳用戶：kiklkook
With the advances in the semiconductor and communication industries, it has become increasingly important for electrical engineers to develop a good understanding of microelectronics. This book addresses the need for a text that teaches microelectronics from a modern and intuitive perspective. Guided by my industrial, research, and academic experience, I have chosen the topics, the order, and the depth and breadth so as to efficiently impart analysis and design principles that the students will find useful as they enter the industry or graduate school.
標(biāo)簽： communication semiconductor increasingly industries
上傳時(shí)間： 2013-12-19
上傳用戶：evil
my AVL tree implementation. Have tested it for 8! deletions sequences with 8! insertion sequences. Fast for order statistics.
標(biāo)簽： sequences implementation deletions insertion
上傳時(shí)間： 2017-03-02
上傳用戶：lixinxiang
karatsuba multiplication using vectors. O(n^l.6). Base 10. To change to higher bases like 10000 you have to change the multiply order.
標(biāo)簽： multiplication karatsuba vectors change
上傳時(shí)間： 2014-01-25
上傳用戶：han_zh
simple ATM [Automatic Teller Machine] system the basic functions Login including write-offs, inquiries, deposits, withdrawals and alter the code. Simulation of ATM terminal users logged in, their account numbers and passwords through the ATM network to transmit to the server, ATM database server based on the information to confirm the account number and password is correct, the results back to the ATM terminal. If the correct account number and password, the ATM into the next terminal interface Otherwise prompt mistakes. Cancellation notice for the operation of the server ATM transactions concluded inquiries, deposits, withdrawals and alter the code operations are first sent an order to ATM servers, ATM by the database server implementation of the corresponding operation and operating res
標(biāo)簽： write-offs Automatic functions including
上傳時(shí)間： 2014-01-20
上傳用戶：semi1981
This code takes data received from a bearing and converts it from the time domain to the frequency domain in order to determine bearing defect size.
標(biāo)簽： from frequency the converts
上傳時(shí)間： 2017-03-11
上傳用戶：sunjet
合同與報(bào)價(jià)系統(tǒng) PB8開(kāi)發(fā)，sysbase sql anywhere7 默認(rèn)密碼：user:admin password:admin ODBC設(shè)置為 Database=HxFirm UserId=tt ServerName=order LogId=tt
標(biāo)簽： PB8 合同 報(bào)價(jià)
上傳時(shí)間： 2017-03-17
上傳用戶：龍飛艇
this program is insertion_sort that writted with c++. this program get an array and sort it in order n^2.
標(biāo)簽： program this insertion_sort writted
上傳時(shí)間： 2014-11-09
上傳用戶：rocketrevenge
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx廬 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis applications.
標(biāo)簽： applications development hardware paper
上傳時(shí)間： 2013-12-21
上傳用戶：jichenxi0730
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