The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時間： 2013-11-13
上傳用戶：fredguo
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.
上傳時間： 2014-12-28
上傳用戶：270189020
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
上傳時間： 2013-10-13
上傳用戶：bakdesec
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
上傳時間： 2014-01-18
上傳用戶：bs2005
The P82B96 offers many different ways in which it can be used as abus interface. In its simplest application it can be used as aninterface between bus systems operating from different supplyvoltages. Opto isolation between two bus systems is possible, andalso the availability of the Tx and Rx signals permits interfacing ofthe P82B96 with other bus systems which separate the forwardoutput path, from the backward input signal path.
上傳時間： 2013-10-11
上傳用戶：洛木卓
The P90CL301 is a highly integrated 16/32 bit micro-controller especially suitable for applications requiring lowvoltage and low power consumption. It is fully software compatible with the 68000. Furthermore, it provides bothstandard as well as advanced peripheral functions on-chip.One of these peripheral functions is the I2C bus. This report describes worked-out driver software (written in C) toprogram the P90CL301 I2C interface. It also contains interface software routines offering the user a quick start inwriting a complete I2C system application.
上傳時間： 2014-01-06
上傳用戶：氣溫達上千萬的
The XA-S3 is a member of Philips Semiconductors’ XA (eXtended Architecture) family of high performance 16-bit single-chip Microcontrollers. The XA-S3 combines many powerful peripherals on one chip. Therefore, it is suited for general multipurpose high performance embedded control functions.One of the on-chip peripherals is the I2C bus interface. This report describes worked-out driver software (written in C) to program / use the I2C interface of the XA-S3. The driver software, together with a demo program and interface software routines offer the user a quick start in writing a complete I2C - XAS3 system application.
上傳時間： 2013-11-10
上傳用戶：liaofamous
Presents short and simple I2C software routines that support onlyslave (rather than master or master & slave) operation and an ASMdemonstration program. The slave-only software in this app notecomplements the master mode software presented in AN464, Usingthe 87LPC76X microcontroller as an I2C bus master.
上傳時間： 2013-11-22
上傳用戶：1039312764
SM-IIC/2051 模塊用戶說明簡介：SM-IIC/2051 是一個基于2051 單片機的I2C 總線控制模塊。上位機接口可直接與PC的RS232 連接，下位機可實現對應用電路中I2C 控制總線的連接，塊內設置2K 的FLASH 存儲器，可存儲用戶I2C 初始化數據。模塊采用2051 單片機，使電路簡單可靠。型號：SM-IIC/2051名稱：I2C 數據控制模塊功能：RS232 串行信號與I2C 數據轉換 接口說明：編號信號標志信號名稱規格備注CK1-1 VCC 供電+5VCK1-2 VCC 供電+5VCK1-3 GND 地GroundCK1-4 GND 地GroundCK2-1 TOUT 串口輸出RS232CK2-2 RIN 串口輸入RS232CK2-3 GND 地GroundCK2-4 GND 地Ground編號信號標志信號名稱規格備注CK3-1 GND 地GroundCK3-2 SCL I2C 時鐘TTLCK3-3 SDA I2C 數據TTLCK3-4 GND 地GroundCK3-5 P1.2 PI/O 端口TTLCK3-6 P1.3 PI/O 端口TTLCK3-7 P1.4 PI/O 端口TTLCK3-8 P1.5 PI/O 端口TTLCK3-9 P1.6 PI/O 端口TTLCK3-10 P1.7 PI/O 端口TTLCK3-11 P3.7 PI/O 端口TTLCK3-12 T1 定時端口TTLCK3-13 T0 定時端口TTLCK3-14 INT1 中斷端口TTLCK3-15 INT0 中斷端口TTLCK3-16 GND 地Ground
上傳時間： 2013-11-18
上傳用戶：爺的氣質
This application note describes how to implement the Bus LVDS (BLVDS) interface in the supported Altera ® device families for high-performance multipoint applications. This application note also shows the performance analysis of a multipoint application with the Cyclone III BLVDS example.
標簽： Implementing LVDS 522 Bus
上傳時間： 2013-11-10
上傳用戶：frank1234
